CFP output emitter resistors

Which of these circuits is the more correct way to construct a CFP output with parallel pairs? Is there a better topology than either version?

Slone used the circuit on the left, but I've seen versions like that shown on the right. The only difference being the position of the emitter resistors.

Has anyone had any good experiences with ferrite beads as gate stoppers to prevent parasitics?


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2002-06-06 4:43 am
R3x in the circuit on the right will have some say in stabilising the output current and also provides local nfb . The one on the left will not affect the quiesent current of the output stage. The MOSFETs on the left should be well matched so that the bias current is equal in both devices .
Thanks for the tips, I'll get on with some more research!

I've had a quick glance at the ESP circuit, and it does seem to make a lot more sense. The circuit on the left is from one of Slones designs, but it just doesn't seem right to me.

Any suggestions for more reading on CFP? Self and Slone mention it, but dont go into great detail, particularly regarding parallel pairs. Info in the art of electronics is pretty scant too.
longthrow said:

both are incorrect:
mosfets have no overdrive protection.
a zener should be there to limit the gate voltage & a diode in series w/ it to reduce the capacitive effect introduced.

Thanks for your comments. I have omitted pretection circuitry for simplicity though. Could you clarify that you believe other defects exist apart from this, or not?
The first one (resistors in the drain) is obviously useless, the second one (resistors in the source) will help equalize quiescent current between paralleled mosfets but not much else.

A practical stage needs source resistors in the output devices if two or more are to be paralleled, and overall thermal feedback, that is to say: the drains of the mosfets should connect to the emitter of the driver transistor. An emitter resistor used as compensation should be considered separately.

As was already said: Rod Elliot's P27 does it just as it should, only without the sometimes necessary frequency compensation resistor.
That one's right.

I'm mean a resistor in series with the input transistor's emitter, not the overall CFP emitter resistor. Read up on CFB amplifiers, a CFP is just a very simple single ended unity gain CFB amplifier, the theory is exactly the same.

The resistor I'm talking about is the same as the resistor in series with the inverting input of a CFB opamp used to stabilize it.
ian_elvar said:
Richie, I stumbled across an old thread of yours:


I'd be interested to hear how you eventually got on? Is there any chance you could post the schematic for the OPS for reference please?

Well the amp worked and the Iq was very stable. I never did get round to drawing a proper schematic though I'm afraid.
Re: Re: CFP output emitter resistors

myhrrhleine said:

Ferrite beads introduce more distortion than resistors, and so are best avoided.

I'm not sure I really agree. Why would they introduce dsitortion? We're trying to stop oscillation at MHz here, so there's clearly no need to choose a bead that will have an effect anywhere near the audio band. Do you have some data or experience with them?

For anyone who's intersted, here's the appnote that I found while digging around for information on parasitic oscillation with FETs.

I can't find much in audio literature regarding ferite beads, so I'm wondering if this is something that may have been overlooked, or whether there is in fact a good reason they're not used. I can't see distortion being one of them though.


2008-03-03 6:41 pm
The microsemi article is applicable to switching inverters or any time high dV/dt occurs. The value of the ferrite bead should be such that it's resistive impedance is several times greater than the parasitic impedances at the ringing frequency. The greatest contributions to the parasitics are the source inductance (typically 10 to 15nH) and the reverse gate-drain capacitance. For example, if you see 100MHz ringing in the gate, the Crss is probably about 170p at the voltage where osciallations are happening. The charachteristic impedance is sqrt(L/C) which is about 10ohms. If you install a ferrite bead in series with the gate which has an impedance of 25 to 50 ohms at 100MHz , oscillations will be damped.