CFP diamond buffer output stage with vertical FETs, thermally stable?

[Russ White]

Ok thats a long thread title...

I am thinking of trying a simple class A/B Diamond buffer type biasing scheme for an output stage with same gain.

I am thinking around 100ma per device of bias.

I am fairly confident about the design except in one important aspect...

Will it be thermally stable? Or will the tempco of the vertical FETs bite me?

I was hoping the CFP arrangement would allow me the freedom to use relatively cheap vertical FETs.

Here is what I have in mind (just the output stage):

 

[kASD]

Your FET Turn -Off mechanism is passive [also the RGS 2.2k is rather high, should be like 150ohms]and would definately exhibit cross-conduction with high frequencies.......
Whereas there are much better ways to implement a Diamond buffer with these FETs

 

[Russ White]

Your FET Turn -Off mechanism is passive [also the RGS 2.2k is rather high, should be like 150ohms]and would definately exhibit cross-conduction with high frequencies.......
Whereas there are much better ways to implement a Diamond buffer with these FETs

Thanks for the valuable input, I will look try what you say.

The bigger issue in my mind is what do I need to do to keep it from going into thermal runaway? I am trying to avoid using a classic VBE/VGS multplier.

Could I simply make Q11 and Q12 higher Ic parts (say BD139/BD140) and place them on the same heatsink as the power devices? This way the VBE of those devices would track the power Qs.

 

[kASD]

Could I simply make Q11 and Q12 higher Ic parts (say BD139/BD140) and place them on the same heatsink as the power devices? This way the VBE of those devices would track the power Qs.

It will not track the proper temperature based VGS deviation, just because the output devices are Vertical Mosfets and their VGS deviation rate w.r.t temperature is not as same as VBE ........of a bipolar device.

 

[Russ White]

Ok after doing some reading of the LTSpice manual I figured out how to step temperature for specific devices. 🙂

I think I might have something here that is temperature stable.

What I did was use two complimentary pairs of VBE multipliers. but only one is attached to the same heat sink as the output VFETs. The factor for the tracking pairs is very small.

This seems track the tempco pretty nicely.


Have a look....

 

[kASD]

Now it looks somewhat promissing..but you have to try it in realworld......😉
But temperature tracking mechanism could be integerated with constant current source also!!!