Book : Small Signal Audio Design - Douglas Self

dearchap

Member
2015-12-17 2:53 pm
Hi
I am looking at the figure in the book and had a couple of questions.

1. Is Vrms the RMS voltage of input signal ?
2. Distortion will have factors of the form Vpeak/Vt (square, cube and so on). So how can the distortion be so low for wide output swings as depicted in figure ?
3. Figure 3.4. How exactly is the data being measured in spice ? Is it instantaneous Vin vs (Vout/Vin) ?

TIA
DC
 

Mooly

Administrator
Paid Member
2007-09-15 8:14 am
I think fig 3.4 is showing how the gain of the circuit alters with varying load impedances by taking a know Vin (along the x axis of the graph) and showing the gain along the Y axis and how that gain varies with differing load impedances. For example at 10 volt input and with a 10k load the gain is shown as approx. 0.990. At no load and the gain is 0.996. Vout isn't shown as such. So the values uses could be equally be peak, rms or even DC.

There are references to rms values in the but these are relevant to the specific topic and example being discussed.
 

dearchap

Member
2015-12-17 2:53 pm
Ok I think I understand Figure 3.4 now. A DC voltage Vin is presented at the input and the output Vout is measured at the load (with coupling capacitor removed ). The quantity plotted is dVout/dVin i.e the small signal gain when the voltage at base of BJT is Vin. Thats why it is referred to as incremental gain.
 

Mark Johnson

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Paid Member
2011-05-27 3:27 pm
Silicon Valley
The text says Because the distortion is mostly second harmonic, its level is proportional to amplitude, as seen in Figure 3.3.

And indeed Figure 3.3 shows amplitude on the horizontal axis, distortion on the vertical axis.

There are several curves plotted, each curve for a different value of Rload (schematic is Figure 3.2). As Rload decreases, distortion increases.

In the caption of Figure 3.3, the author is using "degraded linearity" as a synonym for "distortion". An alternate caption would be
  • Figure 3.3: How various external loads increase the distortion of the simple emitter-follower circuit in Fig 3.2.
 

dearchap

Member
2015-12-17 2:53 pm
Unity Gain Buffer Input Voltage Range

What is the input voltage range that the unity gain buffers are designed for ? Aren't unity gain buffers designed for use in preamp circuits where voltage is less than 2Vp-p ? In Figure 3.4 D-Self mentions that the gain is more linear when the BJT is biased above 0 V. However in most of the resulting circuits the biasing is unchanged for slightly negative voltage. At that biased voltage large input source swing will render the gain totally non-linear. What am I missing ?
 

Mooly

Administrator
Paid Member
2007-09-15 8:14 am
There are no limits as such on a buffer. It is up to the designer to choose a suitable voltage for the stage to work on such that it can handle the required input voltage. The use of a resistive 'load' (the emitter resistor) is the big compromise in the simple version. A standard CD player can put out nearly 6 volts pk-pk at 0db and some players even more. My Marantz is quoted as 2.4vrms so that is 6.8 volts pk-pk. Which is easy for a suitably designed buffer to cope with.

The stage becomes more linear biasing it away from zero and to a more positive value simply because doing so means there is always more voltage across the emitter resistor... this is why adding a current sink in place of the emitter resistor is so much better.
 

dearchap

Member
2015-12-17 2:53 pm
Mooly that makes sense thanks. Do you have the spice models for MPSA42 & 1N4148 ? I am trying to simulate the circuit in Fig 3.5 using LTSpice and I am seeing the bias current for R2 as 4.25mA instead of 6mA. I am using the MPSA42 spice model from Central Semi and the built in model for 1N4148.
 

tomchr

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2009-02-11 12:58 am
Calgary
www.neurochrome.com
There will always be some differences between models. Your best bet is to go with the model from the manufacturer you intend to use. Even then, you'll likely find that the model is weak in some areas. It should get the DC operating point correct, though.

If you have TINA-TI installed, you can try the built-in models for the MPSA42 there. TINA-TI is free from TI.

Tom
 

Mooly

Administrator
Paid Member
2007-09-15 8:14 am
I am trying to simulate the circuit in Fig 3.5 using LTSpice and I am seeing the bias current for R2 as 4.25mA instead of 6mA.

Its as Tom says, there are differences between models. If you drop R3 to around 10k then you should see the current in the 100 ohm increase to nearer 6ma. Doing that will increase the volt drop across each diode by around 50mv.

Or you could tweak the 100 ohm to get exactly 6ma.

Your version is just as valid as Dougs.
 

dearchap

Member
2015-12-17 2:53 pm
Its as Tom says, there are differences between models. If you drop R3 to around 10k then you should see the current in the 100 ohm increase to nearer 6ma. Doing that will increase the volt drop across each diode by around 50mv.

Or you could tweak the 100 ohm to get exactly 6ma.

Your version is just as valid as Dougs.

R3 is for biasing current in diodes only.That shouldn't change the voltage drop across diodes that much. The diodes will have a voltage drop of around 0.6V and will remain around that voltage no matter the current(22K vs 10K). So the voltage drops across 2 diodes will be 0.6x2 = 1.2V. My MPSA42 model shows a Vbe of around 0.75V. So with R2 as 100R the current will be .45/100 = 4.5mA. Changing R2 to around 70R will bias the current to 6.4mA.