The design
Hello,
Back when I was just thinking about getting into electronics, a magazine in Denmark, 'High Fidelity,' published some very nice looking DIY articles. In the fall of 1984, they published a Class AB power amp and I joined a group buy to build these in 1990. Slow forward to 2024, and I thought that I would progress from looking at the pile of bits to actually making a PCB and throwing it all together.
Far more detail than you might want, in our local lingo, at Hifi4All thread .
Schematic below, just showing the amplifier part. (There's also a regulated power supply for the input stage, generating Vcc52/Vee52, and a relay DC protection / slow start circuit.)
There are cascodes in two places, at the 2nd stage with a constant collector voltage for the amplifying device, Q109, and at the output, with a floating cascode bias keeping the Vce of the output device Q115 constant (-ish).
The design evolved a bit after the original article. Originally, the cascode bias at the output was a resistor to positive supply (instead of Q120/R145/D105) and the same Zener diode plus resistor to produce the actual base voltage for the cascode device. The update to current sources was described in a reply to the letters page, noting that for high loads, stability problems in the original design were alleviated by the constant current.
I regularly work with amplifier design, but only in CMOS and only in integrated circuits, so I have never had reason to design exactly this type of cascode stage. In the article on Pass Labs about cascode amplifier design, Fig 9 shows both types of cascodes deployed in this amp. So far, so good.
I also read some detailed advice by Nelson and others, to add a bit of resistance in the gate of the cascode device, to dampen the possible oscillation based on lead inductance in the cascode device package., This design has that, indirectly, so still good.
I did frown a little at the capacitors connected to the cascode voltages, C114 / C115. They are described in the original article, and it is noted that their value controls the slew rate of the cascode voltage. If I were designing a cascode amp with a floating cascode bias, I think the first place I would put the capacitor was across the cascode voltage, i.e. across theoutput device Collector-Emitter Zener diode/Resistor pair, to stabilise the cascode voltage. But, since simulations showed OK-ish transient response, with square waves into 8 Ohm || 1 uF, I thought that I would give it a go. No device type was given for the cascode bias current generator, so I picked a slow (fmax 4 MHz) TO-220 housed pair of devices, KSA940/KSC2073. The cascode devices themselves are high power but not very fast, Motorola MJ11015/MJ11016. The signal output devices are pretty high power and very fast, Toshiba 2SC2565/2SA1095.
I am not very optimistic about the accuracy of the simulations, since the transistor models look pretty sketchy (well, compared to the quality we get at work). On the other hand, there is degenaration in all the voltage amplfication stages, and explicit capacitors to set the bandwidths, so I figured I would plow ahead. I was convinced by a wise member of the board where I described the project to build a prototype, so I did.
I did not keep a lot of the old PCB design, since I am using double-sided PCBs and I thought that I could get some benefit from deviating, notably a ground net which didn't have to connect all over the PCB by wiggling between other nets...
Here's the output stage board design, showing the part which is powered by the high-power supply, Vcc48/Vee48
Best Regards
Jens
Hello,
Back when I was just thinking about getting into electronics, a magazine in Denmark, 'High Fidelity,' published some very nice looking DIY articles. In the fall of 1984, they published a Class AB power amp and I joined a group buy to build these in 1990. Slow forward to 2024, and I thought that I would progress from looking at the pile of bits to actually making a PCB and throwing it all together.
Far more detail than you might want, in our local lingo, at Hifi4All thread .
Schematic below, just showing the amplifier part. (There's also a regulated power supply for the input stage, generating Vcc52/Vee52, and a relay DC protection / slow start circuit.)
There are cascodes in two places, at the 2nd stage with a constant collector voltage for the amplifying device, Q109, and at the output, with a floating cascode bias keeping the Vce of the output device Q115 constant (-ish).
The design evolved a bit after the original article. Originally, the cascode bias at the output was a resistor to positive supply (instead of Q120/R145/D105) and the same Zener diode plus resistor to produce the actual base voltage for the cascode device. The update to current sources was described in a reply to the letters page, noting that for high loads, stability problems in the original design were alleviated by the constant current.
I regularly work with amplifier design, but only in CMOS and only in integrated circuits, so I have never had reason to design exactly this type of cascode stage. In the article on Pass Labs about cascode amplifier design, Fig 9 shows both types of cascodes deployed in this amp. So far, so good.
I also read some detailed advice by Nelson and others, to add a bit of resistance in the gate of the cascode device, to dampen the possible oscillation based on lead inductance in the cascode device package., This design has that, indirectly, so still good.
I did frown a little at the capacitors connected to the cascode voltages, C114 / C115. They are described in the original article, and it is noted that their value controls the slew rate of the cascode voltage. If I were designing a cascode amp with a floating cascode bias, I think the first place I would put the capacitor was across the cascode voltage, i.e. across the
I am not very optimistic about the accuracy of the simulations, since the transistor models look pretty sketchy (well, compared to the quality we get at work). On the other hand, there is degenaration in all the voltage amplfication stages, and explicit capacitors to set the bandwidths, so I figured I would plow ahead. I was convinced by a wise member of the board where I described the project to build a prototype, so I did.
I did not keep a lot of the old PCB design, since I am using double-sided PCBs and I thought that I could get some benefit from deviating, notably a ground net which didn't have to connect all over the PCB by wiggling between other nets...
Here's the output stage board design, showing the part which is powered by the high-power supply, Vcc48/Vee48
Best Regards
Jens
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The problem
I got the stuffed board and a hopefully sufficient power supply lashed up, and connected to an 8 Ohm test load. I was delighted to see that it ran very well, producing something like 100W in 8 Ohm before the cascode voltages started clipping. Things looked OK, to me.
Square wave 8 Vpp, output voltage (blue) and positive cascode (red), 7.5 kHz square wave.
With a 8 Ohm || 1 uF load, square waves was a different story... The amplifier survived, but the waveforms were grim.
I'm mainly showing the various signals in the amplifier for an output amplitude of 8 Vpp. Things only get worse with higher amplitudes, but the interesting thing is showing up nicely, and that is what I want to ask about specifically.
The output at the feedback point is still very close to a square wave (that's what the feedback is doing, after all), and the output is beginning to show a bit of ringing. The inductance value in the schematic is a guess based on the location of the peak in the article AC response measurement, in reality it is a 8 mm diameter, around aircore, 20 turns of copper wire.
So, the feedback point, blue trace, and at the output of the amp, red trace.
OK, ringing, but nothing to scare gentle souls.
Negative cascode voltage (red curve) and feedback point (blue, as always)
And the bad plot. It gets cartoonishly bad at larger amplitudes, but the thing I want to ask about is showing up beautifully at this amplitude. The positive cascode voltage in red
Yikes!
I suspected the cascode bias voltage, i.e. where C115 is connected, but that is looking OK and pretty much the same for both polarities. Here the positive
If we go back to the positive cascode voltage, and zoom in, we see a short burst of the problem and then resumption of normal operation
While this does not (at this amplitude) show up in the output, the internal node at the output of the first stage does look alarming. It is already coping with delivering the reactive current, tracking the oscillation of the LC, and then the problem occurs briefly.
Feedback output in blue and S2in1 in red. The internal node is measured in AC coupling, and is a much lower amplitude.
Best Regards
Jens
I got the stuffed board and a hopefully sufficient power supply lashed up, and connected to an 8 Ohm test load. I was delighted to see that it ran very well, producing something like 100W in 8 Ohm before the cascode voltages started clipping. Things looked OK, to me.
Square wave 8 Vpp, output voltage (blue) and positive cascode (red), 7.5 kHz square wave.
With a 8 Ohm || 1 uF load, square waves was a different story... The amplifier survived, but the waveforms were grim.
I'm mainly showing the various signals in the amplifier for an output amplitude of 8 Vpp. Things only get worse with higher amplitudes, but the interesting thing is showing up nicely, and that is what I want to ask about specifically.
The output at the feedback point is still very close to a square wave (that's what the feedback is doing, after all), and the output is beginning to show a bit of ringing. The inductance value in the schematic is a guess based on the location of the peak in the article AC response measurement, in reality it is a 8 mm diameter, around aircore, 20 turns of copper wire.
So, the feedback point, blue trace, and at the output of the amp, red trace.
OK, ringing, but nothing to scare gentle souls.
Negative cascode voltage (red curve) and feedback point (blue, as always)
And the bad plot. It gets cartoonishly bad at larger amplitudes, but the thing I want to ask about is showing up beautifully at this amplitude. The positive cascode voltage in red
Yikes!
I suspected the cascode bias voltage, i.e. where C115 is connected, but that is looking OK and pretty much the same for both polarities. Here the positive
If we go back to the positive cascode voltage, and zoom in, we see a short burst of the problem and then resumption of normal operation
While this does not (at this amplitude) show up in the output, the internal node at the output of the first stage does look alarming. It is already coping with delivering the reactive current, tracking the oscillation of the LC, and then the problem occurs briefly.
Feedback output in blue and S2in1 in red. The internal node is measured in AC coupling, and is a much lower amplitude.
Best Regards
Jens
Hi
Indeed it does not appear to be mandatory for the voltage. (The devices are 150W max, so they might be struggling for low impedances, but still.) The article quotes audible improvements, following improvements by cascoding the second stage devices. Not to rely on authority, but Nelson's article quotes both linearity improvements and audible improvements.
To be honest, I just wanted to complete a project and didn't question the fundamentals.
Best Regards
Jens
The Questions
The cascode bias device. I did not chose a fast device. For a moment, I was thinking "it's a DC current, what could possibly go wrong?" On the other hand, the current generator has a very dynamic load voltage, and the device speed could be a factor in maintaining the output current. (D'oh!) . So, should I just drop in a pair with Fmax 100 MHz? (I have bought some TTC004B/TTA004B devices.)
The capacitive decoupling. To me, if C108 were connected across the cascode voltage generator, D101/R132, it should fight the strange waveform across the output device. What's the experience with putting a cap near a floating cascode bias?
The cascode devices. Is it wise to use power devices which are that much slower? I actually bought too many of the shiny Toshibas, so I could spend some of those, if speed is a benefit.
Anything else that I am overlooking?
Any help much appreciated, thanks for your attention.
Best Regards
Jens
The cascode bias device. I did not chose a fast device. For a moment, I was thinking "it's a DC current, what could possibly go wrong?" On the other hand, the current generator has a very dynamic load voltage, and the device speed could be a factor in maintaining the output current. (D'oh!) . So, should I just drop in a pair with Fmax 100 MHz? (I have bought some TTC004B/TTA004B devices.)
The capacitive decoupling. To me, if C108 were connected across the cascode voltage generator, D101/R132, it should fight the strange waveform across the output device. What's the experience with putting a cap near a floating cascode bias?
The cascode devices. Is it wise to use power devices which are that much slower? I actually bought too many of the shiny Toshibas, so I could spend some of those, if speed is a benefit.
Anything else that I am overlooking?
Any help much appreciated, thanks for your attention.
Best Regards
Jens
How about exclude Q117, Q114 from the cascode.
The node in the circle is in high impedance state. It could be driven from the VAS, also could be driven in the opposite direction from the cascode. I think that is what is happening. It is driven by the cascode causing positive feedback.
The node in the circle is in high impedance state. It could be driven from the VAS, also could be driven in the opposite direction from the cascode. I think that is what is happening. It is driven by the cascode causing positive feedback.
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The spike may be due to the inductive kick from L101 forward-biasing D1D1 and charging C108.
C108 looks like it is in the wrong place. C108 would make better sense if it were connected in parallel to the series combination of D1D1 and R132. Ditto for C109, R134, and D1D2.
The cascode output stage is unnecessary.
Q115 and Q118 lack emitter resistors. The amplifier cannot be biased enough to eliminate crossover distortion and be thermally stable at the same time.
Kudos for having built the amplifier, but it needs emitter resistors and would work better without the cascode.
Ed
C108 looks like it is in the wrong place. C108 would make better sense if it were connected in parallel to the series combination of D1D1 and R132. Ditto for C109, R134, and D1D2.
The cascode output stage is unnecessary.
Q115 and Q118 lack emitter resistors. The amplifier cannot be biased enough to eliminate crossover distortion and be thermally stable at the same time.
Kudos for having built the amplifier, but it needs emitter resistors and would work better without the cascode.
Ed
I think the idea behind the cascode was to allow the outputs to be biased high enough to keep crossover distortion low without emitter resistors. With just 5 or so volts across the output device the heating at quiescent will be tiny. The upper device takes the bulk of it. Square waves will obviously be a problem as the upper device can’t track fast enough, leading to the spikes. The waveforms to me look no better than a run of the mill class H amplifier. An equally fast cascode on top would help - say two C2565’s in parallel plus a proper driver. The same 3 devices in parallel, with 0.2 ohm emitter resistors on each would probably outperform all of it, though.
Interesting idea. Even with 5V Vce, Q115 and Q118 will heat up when a signal is applied. Then, the bias current will increase a lot. I suspect that the bias current has to be set unusually low.
Ed
Ed
They won’t heat up nearly to the degree that they WOULD with 48V across them. Thermal run away problems are far worse at elevated voltage. Amplifiers running on low vce can routinely be run without emitter resistors if there is thermal tracking.
Without emitter resistors, a 10C temperature difference between the output transistors and Vbe multiplier will lead to a 2.5x increase in bias current. I think this can work only at very low bias.
Ed
Ed
Thanks for the interesting replies.
The bias current targets 275 mA in the outputs. The emitter resistors are explicitly removed to reduce distortion, following the lead of an article by Terje Sandstrøm (of Electrocompaniet), Distortion in Class AB Power Amplifiers . (I haven't read it, but the designers appear to have gotten a lot out of it.) In the article, a link between the emitter resistance and the quiescent current and distortion is established and the designers of this amp found that zero was a good value for the emitter resistor.
The article describes the evolution of the design in these terms: Firstly, a reduction of distortion in the VAS was achieved using cascoding. Then the emitter resistor was removed, following the article. Then the output cascode was added as an experiment, and better audible results were noted.
I like the encouragement to move the cascode voltage stabilisation capacitors, I will do that as one experiment. Also, the idea of moving Q114/Q117 out of the cascode. And I think I'll replace the DC current transistors with some high speed types, while I'm playing around.
I'm not so sure about inductive kickback forward biasing the diode. Isn't the cascode voltage going in the wrong direction for that, in the short burst of instability?
I already did slow down the input (by increasing C101) which did help in simulation, exactly with problems when driving a partially capacitive load. But, I'm down to a -3 dB frequency just above 30 kHz...
I have to agree, that no cascode and two or three of the fast Toshiba output devices (with emitter resistors) look like a safer bet 🙂.
Best Regards
Jens
The bias current targets 275 mA in the outputs. The emitter resistors are explicitly removed to reduce distortion, following the lead of an article by Terje Sandstrøm (of Electrocompaniet), Distortion in Class AB Power Amplifiers . (I haven't read it, but the designers appear to have gotten a lot out of it.) In the article, a link between the emitter resistance and the quiescent current and distortion is established and the designers of this amp found that zero was a good value for the emitter resistor.
The Q113 bias device is mounted with as good thermal coupling as possible.
The article describes the evolution of the design in these terms: Firstly, a reduction of distortion in the VAS was achieved using cascoding. Then the emitter resistor was removed, following the article. Then the output cascode was added as an experiment, and better audible results were noted.
I like the encouragement to move the cascode voltage stabilisation capacitors, I will do that as one experiment. Also, the idea of moving Q114/Q117 out of the cascode. And I think I'll replace the DC current transistors with some high speed types, while I'm playing around.
I'm not so sure about inductive kickback forward biasing the diode. Isn't the cascode voltage going in the wrong direction for that, in the short burst of instability?
I already did slow down the input (by increasing C101) which did help in simulation, exactly with problems when driving a partially capacitive load. But, I'm down to a -3 dB frequency just above 30 kHz...
I have to agree, that no cascode and two or three of the fast Toshiba output devices (with emitter resistors) look like a safer bet 🙂.
Best Regards
Jens
When doing an H-class, the cap goes in parallel with the voltage reference. 100 uF of it. One can then dispense with the current source and use a resistor to the upper rail. This will allow the base of the upper to be driven above the rail, getting the cascode device into saturation. You will want high speed devices for driver and output of the uppers if you do run the driver to saturation (the output never will). 3 MHz drivers inside those MJ11015’s are slow to come out of saturation. A proper 100 MHz driver might take a few ns (so what).
The difference between this and an H-class is simply the addition of the commutating diode at the power device’s collector, going to the lower voltage rail. That introduces a measurable glitch at the hand off point, but usually at a high enough voltage where the amp’s output level will mask it. With just the cascode, the overall dissipation isn’t reduced, but some of it handed off to the upper. With NO switching, the only way to get a glitch is if the upper device is too slow to properly track.
In yet still another implementation, the voltage reference is made with two equal resistors, splitting the voltage more or less equally. A lot of 1970’s and some 80’s amps did that to get 200W out of 100V devices (on 150 volt supplies). Most of those amps had serious problems. Those only got solved with high speed devices, using triples, or both.
The instability is more than can be explained by the inductor.
It is true that smaller emitter resistors will reduce distortion at high bias currents. See my article on Class AB Biasing. The lower bound on the resistor value is set by thermal margin. I am surprised that the authors got away with 275mA.
Ed
It is true that smaller emitter resistors will reduce distortion at high bias currents. See my article on Class AB Biasing. The lower bound on the resistor value is set by thermal margin. I am surprised that the authors got away with 275mA.
Ed
Hej Knut,
Yes, but then we start getting rid of bandwidth, and one of the points of using the super fast devices is that we could get away with high bandwidth (open-loop gain simulates as flat to more than 20 kHz), if only the cascodes could keep up...
Best Regards
Jens
I did get the AES article referred to in the original construction article. The author gets the trends that you are getting, but with math. (I'm impressed, maybe I'm easy 🙂 )
If I go without the cascode, I will need to find out how to set up the emitter resistor.
Best Regards
Jens
As you know well with chip amps, why bother discrete amps? Something like LM3886 could beat most of discrete designs.
How well does the cascode version do comparing to that without cascode? Do you have data?
Hi Ed,
I measured the current in the diode/resistor by measuring the voltage at the top of the resistor. I also measured the voltage at the top of the diode, and it is not showing the huge instability, just a little kink.
I lean towards the notion that the three devices around node TO_CC_C (the one with the huge spike) fail to turn on at the same time, as the current in the positive output has to increase rapidly.
The voltage on the feedback point, AmpOut, in blue, the voltage at the top of the resistor CscRR in red. Expected a DC shift up by just under 2 V (45 mA into 39 Ohm, or theresabout). We get this, with just a little kink
The top of the R+D floating DC source, still looking like the output plus a constant. Red curve now CscCC. The 4.7V Zener diode is giving 5 V. Close enough.
And at this amplitude, already spikes on red curve TO_CC_C
The base voltage is basically well behaved, no matter how little we trust C108 and/or the speed of the DC current source.
And the emitter voltage on the cascode is quite a bit higher than its base voltage. That sounds bad.
The VAS output voltage behaves well, 1.29 to 1.46 V above the AmpOut depending on current.
I'm not sure what could pull the cascode device emitter up. What was that about package parasitic inductance?
Best Regards
Jens
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