bias low Id (Id=1-3mA) for high Idss jfet (Idss=10-12mA)

[yeuclassa]

as title when I bias low Id (Id=1-3mA) for high Idss jfet (Idss=10-12mA). what is the sound?

 

[2 picoDumbs]

That depends on what it's driving.

Pico yeu class A hon.

 

[yeuclassa]

That depends on what it's driving.

Pico yeu class A hon.

example I used K170V-74V (Idss=10mA) for Hiraga amp input stage with bias Id=2mA

 

[AndrewT]

It will behave almost identically as a 4mA Idss SK170gr
Look at the plot in the datasheet. At low currents the gm of all the different Idss devices are almost identical.
The biggest difference will be the in to out DC offset.
The high Idss device will have a higher Vgs and that translates to a higher offset.

In an LTP the two offsets cancel, but in single ended mode there is no cancelling Vgs.