Amplifier with nested Miller compensation

matze

Member
2012-09-12 5:45 pm
After some years of experimentation with different amplifier topologies I would like to share with you the following schematic. I post this result here, because I have much benefited from the discussions here as a silent listener.

Discussion of current design variant starts at post #100 >here<

Edit 22nd April 2013:
Maybe, I first have to clarify the main idea proposed in this thread.
With the advent of low-voltage operational amplifiers, especially CMOS, the designers had the problem that the active devices did not provide enough transconductance in order to get good DC gain figures. This was due to the standard OPA architecture with only two effective gain stages: differential transconductance plus transimpedance stage (VAS). Thus, they were forced to throw in more gain stages that had to be compensated somehow. Nested Miller compensation is in my eyes just the simplest scheme, more are discussed e.g. in Johan Huijsing's book. (BTW, also thrilling there: biasing circuits for rail-to-rail A/B output stages [without cut-off], linearisation of rail-to-rail input stages, multipath frequency compensation and discussion of many design examples, including a few important standard OPA)
Lacking DC gain is of course not our problem. But each nested Miller compensation loop does provide, as a side-effect, extra feedback around the output stage. This is what I'm proposing to exploit.
End Edit 22nd April 2013


In the current version, the amplifier is a breadboard design delivering only a few watts for room listeneing levels. The supply voltages are 20 volt, the mains transformer only delivers 30 W. The amplifier drives, however, a really difficult and highly resolving load (Dynaudio Crafft) with excellent bass quality (comparable to Bryston) and incredible overall naturality and smoothness.

I cannot measure its objective performance. Simulation indicates, however, good results (very low THD20 at low to medium levels, very clean response to rectangular signals). The rectangular response looks as nice on the oscillograph as in the simulation.

I have written a small text matzes-amp.pdf that shall describe the ideas behind the design. Although the overall schematic looks quite complex, it is just a repeated application of the same simple principle. The schematics referred to in the text are fig1.asc to fig5.asc.

matzes-amp.asc is the overall LTSpice schematic. It uses trans.txt (models for D44/D45 from Harry Dymon, adapted BD139/40 models) and bc-co.txt (models for bc-npn und bc-pnp which are the BC550/60 models from Bob Cordell). All resistors in series with blocking capacities are just ESR placeholders.


Best regards,
Matze

Note: Schematics fig1.asc to fig5.asc contain mistakes that have been corrected in post #3. In post #7, the figures are given as screenshots.

View attachment matzes-amp.asc

View attachment matzes-amp.pdf

View attachment bc-co.txt

View attachment fig1.asc

View attachment fig2.asc

View attachment fig3.asc

View attachment fig4.asc

View attachment fig5.asc

View attachment trans.txt
 
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Dave Zan

Member
2010-11-21 7:12 am
Nice to see some ideas about fundamentals. Pretty rare:)
But your ASCs don't actually show any feedback connection?
And the polarity of the "VAS" and the "OPS" look inconsistent.
I remember that some of the Spice sources have polarity conventions that seemed counter-intuitive but that would not explain inconsistency.

Best wishes
David
 

matze

Member
2012-09-12 5:45 pm
Correction of principle schematics

Dear Dave,

thank you for the comments. Of course, you are right. It is funny that the simulation of bode plots even may bring the right results if one does not get the basics right ;)

The "VAS" has to be inverting, and even the input stage G1 had the wrong sign of amplification. Se below the corrected schematics fig1 to fig4. For instance, in fig1.asc, if we apply a positive voltage to '-' of G1, a (positive) current is injected into the left side of C2, forcing E2 to output a positive voltage so that its '+' input remains near ground as C2 charges.

Concerning your question with the feedback path, I have tried to clarify the schematics. The "real" input of the whole amplifier is '+' of G1, and R2/3 form the feedback network. As the amplifier output is not really loaded by the feddback path, I have used this simple scheme. In order to see the closed-loop response, connect V1 to R1 and R3 to OUT.
In fig4.asc, we can see the bode plot of the inner loop by disconnecting R5 from OUT and connecting it to V1, leaving R3 "in the air". (Compared to fig3, the gm of G2 has increased ten times, because the connection to OUT now again goes via a divider R4/5)

Matze

View attachment fig1.asc

View attachment fig2.asc

View attachment fig3.asc

View attachment fig4.asc
 

matze

Member
2012-09-12 5:45 pm
Performance examples

Here are two examples that may demonstrate the good performance despite the *very* simply "VAS" and output stages.
The first is an FFT of a 20 kHz sine with 1V rms into 4 Ohms. The second shows the response to rectangular input (rise/fall time 1ns, of course somewhat flattened by the input low-pass). The additionally plotted behaviour of one LTP current demonstrates the good internal stability: virtually no overshoot on any node in the amplifier internals.

[[ To my ears, the amplifier just sounds marvelous: authorative, transparent, grain-free, colorful depending on the material. ]]

Matze


fft20-1vrms-4ohms.gif

10k-rect-4ohms.gif
 

matze

Member
2012-09-12 5:45 pm
Screenshots for schematics

Dear lineup,

sorry, this is my first substantial input to the forum. I just thought it to be practical to have the sim input files. But I agree, just for reasoning it may be more practical to have a simple image.

Here are the schematics as screenshots. Fig1 to Fig5 relate to the small "paper" matzes-amp.pdf

Greetings,
Matze


matzes-amp.gif

fig1.gif

fig2.gif

fig3.gif

fig4.gif

fig5.gif
 
I can not see .asc files.
Why not make an ordinary image for everybody to see. = screencapture
No, I wont install LTspice only for to see your .asc schematic.
It is difficult to decide what kind of files should be attached to a post. I would wager that most of us use circuit simulators to investigate ideas and to design projects, and LTSpice is probably the most popular simulator . . . but, like "lineup" said, that isn't true for everybody. And, the " *.asc " file extension may cause problems because it is not unique to LTSPice. (The " *.sch " extension used to denote schematic drawings in some programs is even worse!)

Using something like the no-charge "CutePDF Writer" to "print" the LTSpice schematic is about the same amount of work, and probably more versatile, than using something like the Windows "Snipping Tool" to get a screen shot - especially on large or very crowded schematics.

On the other hand . . . when a post such as this thread says, "Hey, I have been playing with this circuit in simulation and I'd like to have your comments . . . ", many of us would like to at least verify your simulation conclusions, check your options and settings to be sure the simulation is giving accurate results, see how our favorite devices behave in the proposed circuit, etc. For these members it is VERY helpful (and you are more likely to get useful comments) if you attach the simulator file (and don't forget to list the device models you used!).

It just proves that you can't please everybody!

Dale
 

matze

Member
2012-09-12 5:45 pm
Example from Bob Cordell's Book

Probably I have a bit overdone with my initial example, that nevertheless fills the living room with highly enjoyable sounds.

Here is an application to the example amplifier from Bob's book, page 63.

basic-schem-bode.png is the schamtic used to get the bode plot for the main feedback loop (basic-bode.png). One sees a unity gain crossover of around 400 kHz, the gain margin is more than 20 dB, phase margin is around 85 degrees.
basic-schem-fft.png shows the schematic for the FFT, 10kHz, 1 V rms into 4 ohm. My way to enforce a low simulation step is the additional dummy voltage source V4, spinning at 1 MHz.
basic-fft.png shows the FFT, the reading from the Spice .four command is 0.037%.

Example with one nested Miller compensation loop comes in the next post.

Matze


basic-schem-bode.png

basic-bode.png

basic-schem-fft.png

basic-fft.png
 

matze

Member
2012-09-12 5:45 pm
... now with nested Miller compensation

The schamtic is nested-schem-fft.png. As discussed in the text matzed-amp.pdf in the first post, the simple transconductance stage with Q16, Q17 works quite well, here with the current source I1 as load. In order to ensure balanced voltages at the LTP output and sufficient Vce over Q16, I have reduced the negative supply voltage of the input stage. The additional voltage source V6 further reduces Vce of Q5.

nested-schem-bode-inner.png schows the schematic used to get the Bode plot of the inner feedback loop. In nested-bode-inner.png, we see a unitiy gain crossover of about 400 kHz, phase margin a bit more than 85 degrees. Gain margin is more than 30 dB, since the zero-degree frequency is quite high (very very probably, this does not translate to reality ...).
nested-schem-bode-outer.png is the schematic for the Bode plot nested-bode-outer.png of the outer loop. It very closely resembles the Bode plot of the basic amplifier from the last post.

nested-schem-fft.png and nested-fft.png are for the FFT, 10kHz, 1V rms into 4 ohm. The reading from the .four Spice command is 0.0038% :rolleyes:.

I did not yet investigate clipping behaviour and behaviour on turn-on and turn-off.

Matze

nested-schem-bode-inner.png

nested-bode-inner.png

nested-schem-bode-outer.png

nested-bode-outer.png

nested-schem-fft.png

nested-fft.png
 

matze

Member
2012-09-12 5:45 pm
One more example

Here is a further example of Bob's demonstration amplifier (page 63 of his book), now with
two nested Miller compensation loops.

The unity gain crossovers again are around 400 kHz. This is achieved without compensation capacitors in
global feedback loop or over the LTP degeneration resistors. Thus, as Bob points out in his
book and is also my experience, the danger of grainy sound due to high-frequency overloading is reduced.

Simulated THD at 10kHz is 1.7ppm at 1V rms into 4ohm, 3.7 ppm at 10V into 4ohm (readings
from the .four command). See also fft-10k-1V.png and fft-10k-10V.png.

The Bode diagrams of all loops in global-loop.png, nested-loop-1.png, and nested-loop-2.png look like in a text book.
A rough estimation of the VAS loop behaviour is depicted in loop-vas.png. It is not that ideal,
but the phase margin still appears to be larger than 60 degree.

OPS quiescent current is about 50 mA, i.e. total supply current is lower than 100mA.

There is a problem with all loops (as in Bob's original amplifier, too), if the load capacity C8 is set
to e.g. 10nF, and the load resistor R20 to 1K. Then the series resonance between L2 and C8 remarkably
reduces the phase margins, see series-resonance.png.
Unfortunately, the effect does not vanish with higher OPS quiescent current. Probably, only faster
output transistors can cure that.

Behaviour during turning on and off and clipping is considered in the next post.


Matze


double-nested-miller.png

fft-10k-1V.png

fft-10k-10V.png

global-loop.png

nested-loop-1.png

nested-loop-2.png

loop-vas.png

series-resonance.png
 

matze

Member
2012-09-12 5:45 pm
Clipping and turning on/off

Clipping behaviour is not nice, see clipping.png. At least, the amplifier remains stable. Do not yet know what happens if one includes short circuit prevention in the OPS.
Probably it would be best to add some circuitry to prevent clipping at all.

I also had a look on behaviour during turn on and off. In the simulations, main supply voltages are turned on after one second, and turned off after 5 seconds.

In no-clamp.png, one sees output excursions to both supply voltages on turn on, but no high-frequency oscillations relating to only conditional stability.
In clamp-pos.png, Q28 together with D8 and D9 restricts the positive voltage at the Vbe multiplyer,
so that only around 300mV can appear at the output. For that, one would need additional circuitry in place
of the PWL voltage source V3 which turns Q28 off after 1.5 seconds.
The high negative voltage can be supressed by delayed biasing of Q16 due to R41/C17, see clamp-both.png.

================================

I think that nested Miller compensation may be a valuable ingredient to build good amplifiers.
Audio amplifier construction should not neglect techniques routinely applied in operational amplifiers.


Are there any comments?

================================


Matze

clipping.png

no-clamp.png

clamp-pos.png

clamp-both.png
 

matze

Member
2012-09-12 5:45 pm
Nice try!

The outer Miller loop gets feedback directly from output stage so that it can achieve very low THD.

That's the same idea as TMC.

BTW, did you sort out the Math

Hi,

thank you for the comments.

I aggree that the approach lies somewhere between "our" TMC approach and the conventional nested Miller compensation. As in the former, all but the most inner loop (around VAS) include the output stage, thus increasing the NFB around VAS and OPS. From the latter stems the idea of recursive application of the compensation scheme, the difference being that in OPAs all "right end sides" of the Miller capacitors are connected to the same point, usually the output.

Doing the Math certainly would be a good undertaking. May be it could bring more justification and better dimensioning rules than the simple explanation that I tried to give in "matzes-amp.pdf" in post #1. To my defense I can only say that this rather informal approach is along the lines of Johan Huijsings OPA book, which provides a very clear but accessible explanation of all this stuff -- except of course the tricks with the additional zero.

A mathematical treatment could bring a better understanding especially of the transient behaviour. To be honest, I'm also a bit suspicious whether these nice 90 degree phase margins and 20dB per decade roll-offs really mean that the whole circuit will (at least in principle) behave like a simple topology with first-order characteristics.
From my breadboard amplifier (post #1), where I strechted the whole idea as far as possible, I only can say that the square wave response looks as nice on the oscilloscope as in the simulation.

BR,
Matze
 

matze

Member
2012-09-12 5:45 pm
BTW, did you sort out the Math
Probably, it will be necessary. I'm not sure about possible higher-order characteristics and others refer to Bode's results that seem to forbid first-order behaviour with increased amount of feedback.

On the other hand, simulating the amplifier and looking at both frequnecy responses and transient square-wave responses (also at internal nodes), one does not see any overshoots in the wrong direction or any ringing. For my simple understanding, this altogether would point to first-order behaviour.

So I will have to look into the text books. This is the system under study from post #7:
http://www.diyaudio.com/forums/atta...amplifier-nested-miller-compensation-fig3.gif

My plan is to first recap the transfer function for a closed loop of a miller integrator and a preceeding transconductance stage (standard OPA theory). Then I have to include an additional pole/zero (the nested Miller cap with zero-providing resistor) in the originally resistive feedback path, giving a modified closed-loop transfer function. Finally, this block should be included into the next outer loop with additional transconductance stage and resistive feedback network. If one can show that the closed-loop transfer function of this outer block has first-order characteristics (of course given the poles / zeros are placed properly), then the work is done.

This certainly sounds too simple. What do you think? Is this the right way?

Best regards,
Matze
 

matze

Member
2012-09-12 5:45 pm
Mathematics for first-order behaviour

In the text below, one sees that each additional feedback loop with nested Miller compensation and additional zero leads to a new first-order transfer function that is theoretically the same as the old function without the additional loop. This, of course, only holds true, if component and transconductance values are exactly matched. Otherwise, pole-zero pairs are created.
From my simulation examples, e.g. post #11, with not at all perfectly matched values, one can follow that this is not a too great problem. All loops still exhibit a nice gain slope of 20 dB per decade.

Matze

View attachment nmc-first-order.pdf
 
In the text below, one sees that each additional feedback loop with nested Miller compensation and additional zero leads to a new first-order transfer function that is theoretically the same as the old function without the additional loop. This, of course, only holds true, if component and transconductance values are exactly matched. Otherwise, pole-zero pairs are created.
From my simulation examples, e.g. post #11, with not at all perfectly matched values, one can follow that this is not a too great problem. All loops still exhibit a nice gain slope of 20 dB per decade.

Matze

View attachment 343885

Hi, Matze,

It will be different cases which depends on whether the outer loop includes output stage or not.
1. If not, the outer loop must maintain the same loop gain bandwidth as you desired, not the inner loop. It is not good idea you put a Zero in the outer loop. It will worse the Gain Margin. I guess with out that Zero, it will remain stable. You will get a super VAS with very HIGH DC gain, and very low output impedance.

2. If outer loop includes output stage, the inner loop should maintain loop gain bandwidth. What I would do is put a EF right in front of VAS. In order to maintain the same as loop gain bandwidth, I would put a 100nF capacitor to the base and emitter of that EF. (That will bypass that EF at high frequency). So far, you will find the loop gain is pretty much a 2 pole compensation. I believe you will get there. The final step is put outer miller capacitor to the base pin of the EF and the output of Output Stage.

The idea is to come up a 2 pole compensation so that you can use the extra gain to compensate with the outer Miller loop. You will get 2-pole performance and 1-pole like frequency response.

I haven't tested yet. Hope that will work.
 
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matze

Member
2012-09-12 5:45 pm
Hi jxdking,

thank you for reading and commenting the ideas.

First, I have to clarify that in the small math derivation, the most outer global feedback loop was skipped. As it is assumed to be purely resistive, it will not change des system characteristcs in question. For a closed-loop system, the calculated transfer function G(s) would equal the loop gain (in the closed loop) times feedback ratio. If we assume for simplicity a feedback ratio of one, unity gain crossover would be at 1/(2 pi R C). For that, the first transconductance stage just had to be thought as a stage with differential input, one serving as "real" input and the second connected to the output b(s).

It will be different cases which depends on whether the outer loop includes output stage or not.
I always assume that the output stage has a low-pass characteristic whichs dominating frequency is much higher than the unity gain crossover above. Let's say 400 kHz for the latter and 4 MHz for the former. Thus, we can place the OPS at any place where the unity gain crossover frequency is well controlled, leaving the additional OPS pole with little influence. In the second picture in the math text, this would be between the VAS integrator and the feedback tap to the Miller capacity with additional resistor. The most inner integration capacitor remains connected directly to the VAS output / OPS input. ( Otherwise, we would produce the so-called "inclusive Miller compensation" with its known difficulties.)

Summing up, both the - in the math skipped - global feedback path and the feedback path with capacitor plus resistor are connected to the OPS output, creating the desired NFB (see also my examples with Bob's demonstration amplifiers and the implemented and bicely operating breadbord schematic from post #1).
The stability margin penalty from including the OPS into these loops is not considered in the math, since we also do not consider it when discussing e.g. the TPC compensation scheme with its second-order characteristic. In this case, only the slopes created by the feedback network around the VAS are discussed, the additional low-pass of the OPS is assumed to be high enough in frequency as to not remarkably change the picture. (Building an amplifier with a unity gain crossover just in the vicinity of the dominating OPS low-pass frequency probably is only feasible if one has a very well defined load impedance.)

It is not good idea you put a Zero in the outer loop. It will worse the Gain Margin. I guess with out that Zero, it will remain stable. You will get a super VAS with very HIGH DC gain, and very low output impedance.
The point of a possible reduction of stability margins due to the "zero-resistor" in a feedback loop was also mine when thinking about such a scheme. See the discussion in "matzes-amp.pdf" together with figures 1..5 in post #1 (figures corrected in a later post). The trick with the additional voltage divider between OPS output and Miller capacities, except around VAS, may solve the problem in most cases. BTW, as this is only possible if e.g. the capacitors are increased by a factor of 10 or 20, the trick probably isn't applicable in integrated circuits.

The idea is to come up a 2 pole compensation so that you can use the extra gain to compensate with the outer Miller loop.
I still hope that the whole scheme does, at least in principle with ideally matched poles and zeros, produce a circuit with first-order characteristics. All relevant feedback loops evaluated show a gain slope of 20dB per decade.

You will get 2-pole performance and 1-pole like frequency response.
What do you mean by performance? Is it just the final result or do you think that we can have a relevant feedback path in the circuit with second-order characteristics, while the overall behaviour is first-order?

I'm wondering about the loop one can open when inserting a probe between OPS output and "right-hand sides" of all feedback paths (except VAS) glued together. This topic is also discussed in the thread on Dadod's TT-TMC. I'm still convinced that it has no physical relevance, as it is the sum of all feedback paths, but not the feedback path important for any single loop starting "earlier" in the amplifier.

Is there anybody who can comment on this last issue?


Thanks and best regards,
Matze
 

Dave Zan

Member
2010-11-21 7:12 am
Is there anybody who can comment on this last issue?

I think one problem with your derivation is that there is an implicit assumption of perfect minimum phase. If phase behaviour is perfectly minimum then every pole but one can be perfectly cancelled and the result will be first order behaviour.
This is also the assumption behind Cherry's Nested Dif. Feedback Loops.
If you can do this then do you need nested loops? Just cancel the poles and have a first order loop.
This kind of hidden assumption can be quite tricky.
More on the outer loop issue when it is not bedtime here!
You could try a PM to JCX. Just his area, when he feels inclined to comment.

Best wishes
David