Amplifier design based on HITACHI topology balanced VAS super hi OLG of 75dB

Member
Joined 2011
Paid Member
Hi everyone,

Here I present an amp design that was inspired by HITACHI balanced VAS topology.
Open loop response is nice and flat in the audio range at 85dB, dipping to 75dB at 20KHz
THD shows to be around 0.0007% into 1khz.
This is not fully finished design.
I am hoping that with the help of the community this can be polished and I am excited to make actual boards.
I am attaching LTSpice file so feel free to download and tweak as you like.

Input stage consists of
LTP with low degeneration resistors,
constant current source supplying 1mA (not sure if that's enough),
and current mirror utilizing helper transistor.

VAS is balanced and cascoded.

Simple Vbe multiplier.

Simple 2EF output stage.

Idea is to use this amp with 36V power supply.

Things that probably will need further testing are the phase margin, distortions at 20khz, step response.

Thank you for looking everyone.
 

Attachments

  • sch.PNG
    sch.PNG
    26 KB · Views: 481
  • OLG2.PNG
    OLG2.PNG
    14.8 KB · Views: 455
  • thd-1k.PNG
    thd-1k.PNG
    23.4 KB · Views: 452
  • hitachi-amp-75db.asc
    10.6 KB · Views: 57
  • Like
Reactions: 1 users
if you're looking to polish, be sure to check clipping (and recovery) behavior of this design.
also, you might want to consider using a emitter follower triple OPS instead of double to further reduce loading of VAS output if you are looking for highest open loop gain.
 
  • Like
Reactions: 1 user
Here I present an amp design that was inspired by HITACHI balanced VAS topology.
yes , Symasui ?? You do need more current between cascode/CCS , and a "hotter" LTP. Most of our
favorite semi's like 1.7 - 2mA .... so CCS = 3-4mA (Ic).
With proper current + EF3 , you get 70PPB @ 1Khz ! Wolverine killer !!
OS
 

Attachments

  • PPB.jpg
    PPB.jpg
    327 KB · Views: 213
  • Like
Reactions: 1 user
Just a hint.
As you have differential VAS output and you are using only one, if you use the other for compensation, the output gets liberated from capacitance and you increase significantly the slew rate increasing slightly the distortion. I did this on Chatarsis to get 1kv/us.
 
  • Like
Reactions: 1 users
  • Like
Reactions: 1 user
Hi. I probably modified this amplifier as best I could. You can put the coil in the differential cascade, but carefully. Then the distortion will decrease by 5 times.
 

Attachments

  • hitachi-amp-75db_2.jpg
    hitachi-amp-75db_2.jpg
    310.7 KB · Views: 218
  • hitachi-amp-75db_2.asc
    15.9 KB · Views: 37
  • Like
Reactions: 1 user
Member
Joined 2011
Paid Member
yes , Symasui ??
Was inspired by it, yes. And the Catharsis.
EF3 it is. added to sch.
By the way Cordell book has a section on triple OPS stability and uses 10R resistors as base stoppers for driver transistors. Output ones have 2.2R base stoppers. I am using same transistors 3281/1302 for drivers and outputs. I wonder if 10R base stoppers for drivers needed at all?
Also, that Japanese trick with caps across the base and collector of the pre-drivers added. As well as power rail decoupling using 10R resistors and 1000uF/470uF caps.
 

Attachments

  • EF3-OPS.PNG
    EF3-OPS.PNG
    6.5 KB · Views: 85
Member
Joined 2011
Paid Member
Added 3EF OPS and compensation for both VAS branches. 0.00004% THD at 1kHz.
20kHz is 0.04% only. maybe something with LTSpice sim settings needs to be tweaked...
OLG sits comfortably above 100dB in the audio range, dipping to 70dB at 20kHz.
Next step is fixing the compensation...

LTP current is 3mA with 200R resistor. (disregard 1.1mA text in the screenshot)
 

Attachments

  • sch-v3.PNG
    sch-v3.PNG
    29.4 KB · Views: 116
  • OLG-v3.PNG
    OLG-v3.PNG
    12.7 KB · Views: 103
  • thd-1k-v3.PNG
    thd-1k-v3.PNG
    19.3 KB · Views: 105
  • hitachi-amp-75db.asc
    14.8 KB · Views: 42
Member
Joined 2011
Paid Member
Hi. I probably modified this amplifier as best I could. You can put the coil in the differential cascade, but carefully. Then the distortion will decrease by 5 times.
I see you using JFETs for VAS. LS came out with dual matched package LS844. I have few of those and it will be fun to try using them.
What is the advantage of using JFETs over BJTs as VAS?

There is also dual matched MOSFETs 2N7002HS - I wonder if those are good for VAS stage too or not?

I also see that you changed compensation to transitional Miller compensation by tying resistor to the negative feedback path.

What are those voltage sources V4 and V5 are used for?

Using paralleled output transistors can be useful for large output currents / low load impedance. But I am planning for 36V PSU and around 100W power output so I am not sure if paralleling two outputs is optimal for those conditions. I might be missing something though... I am thinking instead of paralleling, to use that extra pair of transistors to get 3EF OSP could be a better choice

I also see a nice clipping - what did you modify for that? I suspect diodes D4 and D5?
 
Last edited:
Should be a nice board after all the details ironed out.
Healthy drivers, so no reason to not add more final outputs.

Less Rail sag and lower distortion when driving 4 ohm loads.
Real world bass performance have nice snap to it.

36 volts is a rail voltage I like as well.
But could easily support expandable range
and have SOA to support 36 to 42 even 49 volt rails.
By making enough holes in the board for more outputs.

Regardless at 36 volts 4ohm loads be a breeze with more
devices

HAYK and others seem to be very good at maximizing
Slew rate and holding stability.
Far as a complete beast of beauty.
Coming close to a ideal amplifier. Having high slew, low distortion
and redundant outputs for relentless drive and snap into low impedance
 
Last edited:
  • Like
Reactions: 1 user
Member
Joined 2011
Paid Member
Thank you for your input.

I am quite fond of the idea of putting things in parallel - like chip-amps or transistors. Might as well add paralleled outputs.

I wonder what transistors should be put on heatsink: going from left to right, Vbe multiplier will sit in the middle, then pre-drivers, drivers, and outputs. Making total of 1 + 2 +2 +4 = 9

VAS transistors are 2SA1419T/2SC3649T SMD version (thanks @ostripper for finding those) will be placed on PCB with generous pads for heat sinking.
 
Member
Joined 2011
Paid Member
Input stage fun.

Cascoded constant current source presents great impedance for the LTP transistors.

Cascoded LTP spreads dissipation evenly. Using zener diodes bypassed by 100uF caps to present constant voltage at the common base transistors. Each has their own buffer for ... (not sure why? but it works :) )

Current mirror uses helper transistor.

Classical VAS with Miller cap just for sim purposes.

This was partially inspired from the paper cited earlier in this thread.

Attached LTSpice file if someone wants to make some tweaks.
 

Attachments

  • sch-input-stage.PNG
    sch-input-stage.PNG
    21 KB · Views: 114
  • hitachi-amp-v9 - input stage.asc
    10.5 KB · Views: 43