I'd really like to know how is it possible to get 2.1v RMS with such low thd out of 3.3v DC supplied PCM5102 DAC.
On-chip charge pump. Think ICL7660 but built in. ESS started it (ES9023) I believe and TI/BB jumped on-board later.
Even so...how do i get 2.1v RMS from +-3.3v at -93db THD?Actually i'd like to see such a circuit topology, that can achieve such numbers...
What's the difficulty? -93dB THD isn't particularly impressive for a DAC chip nowadays.
As regards the output swing, a RRO opamp can do 2VRMS from +/-3.3V rails.
As regards the output swing, a RRO opamp can do 2VRMS from +/-3.3V rails.
What's the problem, there's >10% headroom, most DAC and ADC architectures are rail-to-rail intrinsically.
There's a lot of architectures for data conversion chips, you have a lot of reading ahead of you to understand modern high-performance ADCs and DACs. Many use sigma-delta modulators and/or current-steering which are intrinsically highly linear by their nature, and there's been huge competition to produce better and better devices for 40 years.
In particular CMOS devices can act as near-perfect charge switching devices so that charge accounting can be close to zero error easily - not quite the level of counting electrons, but close. The best DACs are current output as voltage is always harder to control than charge.
There's a lot of architectures for data conversion chips, you have a lot of reading ahead of you to understand modern high-performance ADCs and DACs. Many use sigma-delta modulators and/or current-steering which are intrinsically highly linear by their nature, and there's been huge competition to produce better and better devices for 40 years.
In particular CMOS devices can act as near-perfect charge switching devices so that charge accounting can be close to zero error easily - not quite the level of counting electrons, but close. The best DACs are current output as voltage is always harder to control than charge.
Would you please prompt me to some really good read on that ?unfortunately i'm not good with mathematics so i'd prefer something that's not full of formulae that i can't understand...
THD+N @ - 1dBFS –93 / –92 / –90dB
See, at -1dB, so 2.646V peak value for 3.3V power. I also think, that -90 is unrealistic when peak voltage crossing 75-80% of available power line.
See, at -1dB, so 2.646V peak value for 3.3V power. I also think, that -90 is unrealistic when peak voltage crossing 75-80% of available power line.
It is important to consider that the THD+N is specified at -1dBFS. That means that we are looking at about 90% full-scale with a ±3.3V supply. Really you can get >90dB even at 0dB fS, but not with the minimum 1kΩ load that is also specified. The PCM5122 and PCM5142 also let you set the device for VCOM mode, where the output range scales with the supplies, which will give you better THD, but not necessarily 2.1VRMS output if your supplies are sub-nominal. It also has worse PSRR in VCOM mode so the noise component of the THD+N specification can get worse.
http://file2.dzsc.com/product/18/05/25/829029_170233543.pdf
so ess8038 could be considered way better...well...where do i find relevant studies on low supply circuts vs distortions?
Attachments
ESS published some distortion numbers for opamp buffers if used for the AVCC supply in a document on their downloads page: http://www.esstech.com/files/4514/4095/4306/Application_Note_Component_Selection_and_PCB_Layout.pdf
They don't publish distortion numbers vs power supply quality for the other power pins, VCCA, DVCC, and (for some chips) DVDD. Although power quality on those pins can/does affect sound quality performance somewhat, it is probably not plain old stationary THD. Otherwise they would not need to be on separate pins (and on separate voltage regulators in eval boards), and ESS might publish easily measured distortion numbers for them.
Last edited: