The TI THS5671A dac runs 14-bit high-current output at 125MHz. It's also affordable. Now, if we oversample 2x for every bit we drop (dithering as we go...), we retain the full resolution of the original data. Starting from 24-bit data and dropping down to 14 bits means we need to oversample 1024x and dither the 10-bits of truncated data into the 14 bit output... dividing 125MHz by 1024 gives us a starting sample rate of just over 122kHz / 24bit. This can be conveniently acheived using an AD1896, which would simultaneously provide jitter rejection. All that's missing is a CPLD to implement the oversampling and noise-shaped dithering logic (which would take a little work, but not too much).

Another nice thing about the THS5671A: it can be configured to give differential outputs into low impedence loads, which is perfect for direct-coupling to a preamp - without a buffer opamp! All that's needed in-between the DAC and the balanced output is a pair of I-V resistors (4 if you count both sides of one channel), one on either side of a passive L-C filter. As long as the preamp's input is in the kohm range, there shouldn't be any problems! Additionally, due to the extremely high sampling frequency, our analog output filter can be a passive LC type with a corner frequency *way* up where it won't affect the frequency and phase response of the audio range much.

Now, i just have to figure out how i'm going to get all these other projects done so I'll have the time to try this out...