Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 Khz - Page 7 - diyAudio
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Old 23rd July 2014, 12:04 PM   #61
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what would one need to use in an active, 8 channel system?
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Old 23rd July 2014, 01:27 PM   #62
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Hmm, i dont see any capacitive compensation of the R2R network. Is it not needed here?
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Old 23rd July 2014, 02:17 PM   #63
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Originally Posted by soekris View Post
0.01% version:

Was originally planning for the 0.05% resistor version first, due to leadtime of parts. Will now also put priority to get 0.02% resistor version at the same time. I personally don't see the big need for the 0.01% resistor version, the sign magnitude architecture lower the requirement for resistor precision. But I will look into it, has calculated the 0.01% resistor version to USD 350. And all pricing is for complete and tested board, without connectors mounted so you have flexibility.
Thanks, looks like the 0.02% version might be the sober choice then! This way I can order two boards and let the true DIY spirit play with one Anyway, if most people prefer the more expensive version then be it but only if there is something to be gained, you know your design better than anyone.

I would also like to mention that DSD is a very very interesting thing and I do hope to have a device that can do it all and sound like the Total Dac but let's not overload that beautiful project with too many wishes, I need an active filter and a DSD device too but it is more important that it makes good pancakes and Mojito
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Old 23rd July 2014, 03:06 PM   #64
soekris is offline soekris  Denmark
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Quote:
Originally Posted by kuribo View Post
what would one need to use in an active, 8 channel system?
The boards are stereo, so 4 pcs.

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Originally Posted by doctormord View Post
Hmm, i dont see any capacitive compensation of the R2R network. Is it not needed here?
Don't really understand what you mean there, but no need for anything, there is just a simple capacitor at the output of the DAC's resistor chain, making a 270 Khz Bessel low pas filter.
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Old 23rd July 2014, 03:14 PM   #65
DUC985 is offline DUC985  Germany
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Count me in for a board 0.02
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Old 23rd July 2014, 04:11 PM   #66
HpW is offline HpW  Switzerland
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Quote:
Originally Posted by soekris View Post
It's a DAC module based on a discrete R-2R sign magnitude DAC design, with FPGA based reclocking and custom digital filters...
Ok, the temperature coefficients on those resistors are very important! Not only telling the 0.0x% precisions!


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Originally Posted by soekris View Post
.. with 28 bit resolution so there is headroom, oversampling up to maybe 3.072 Mhz.
Nice would be some spline oversampling as WADIA used..

Low level linearity may done as I did using a fast test setup...

See picture
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Old 23rd July 2014, 06:39 PM   #67
soekris is offline soekris  Denmark
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Ok, the temperature coefficients on those resistors are very important! Not only telling the 0.0x% precisions!
I have spent quote some time selecting the right resistors, trying to get as much info on them as possible (not that it's easy). Turns out that the temp coeff are mostly not linear, but parabolic towards temperature extremes. So as the board is designed to operate from 0-50 deg celcius, I decided to use:

0.05% - 25 ppm/C
0.02% - 10 ppm/C
0.01% - 5 ppm/C

Quote:
Originally Posted by HpW View Post
Nice would be some spline oversampling as WADIA used..
I'm very interested in ideas on oversampling/filtering, having not done that much research yet, but would need more details....

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Originally Posted by HpW View Post
Low level linearity may done as I did using a fast test setup...
I also did a -120db FFT, looked perfect, but as my test equipment consist of a EMU-0404 and I expect my DAC to be better than the EMU, I can't really use that as I'm mostly measing the EMU.... And in principle, a sign magnitude DAC should have perfect level linearity.
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Old 23rd July 2014, 07:56 PM   #68
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1 for me in version 0.02. Thanks
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Old 23rd July 2014, 08:32 PM   #69
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Sorry if the question is stupid... but I fail to guess if the design is full balanced or balanced by the active output buffer.
Is the J7 unbuffered output balanced too ?
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Old 23rd July 2014, 08:32 PM   #70
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Originally Posted by soekris View Post
...I'm very interested in ideas on oversampling/filtering, having not done that much research yet, but would need more details....
In the past, an FPGA based FIR filter would push the designer toward an hardware compact filter implementation, which has typically been an half-band digital filter. Of course, an half-band filter compromises filter band-edge performance (being down only 6dB at the Nyquist frequency) for hardware compactness.

If hardware resources inside that Spartan 6 FPGA will permit, I suggest implementing an non-half-band filter which is fully in to the filter's stop-band at CD's 22.050KHz Nyquist frequency, while flat by 20KHz.
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