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Old 23rd July 2014, 05:53 AM   #51
TBM is offline TBM  Norway
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+1 for me in best version (0.01 or 0.02) available
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Old 23rd July 2014, 06:45 AM   #52
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Please count me for the 0.02% version or maybe the 0.01%
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Old 23rd July 2014, 07:47 AM   #53
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Sign me up please. The 0.02 or 0.01% version.
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Old 23rd July 2014, 08:29 AM   #54
RollE2k is offline RollE2k  Sweden
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Would be interested in the 0.02% version.
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Old 23rd July 2014, 08:42 AM   #55
jambul is offline jambul  Belgium
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interested for 0.02% version, i hope you can ship to indonesia.
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Old 23rd July 2014, 08:55 AM   #56
Calvin is offline Calvin  Germany
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Hi,

I personnally donīt believe in a gross sonic superiority of R2R DAC-Cores, as in our experiments they performed no better against bypassed Sigma-Delta-DAC-Cores (PCM1704x8, MSB-DAC against PCM179x).
I donīt know of a valid comparison as comparing DACs doesnīt mean to compare the DAC-Cores only, but also different digital frontends, different supplies and different analog stages at the same.
I rather believe that the surroundings are more important for the acoustic end result.
Especially the digital front end side can make a difference.
Standard oversampling to 192kHz is certainly efficient regarding Hardware effort, but the required uneven upsampling is imho far from optimal.
Why trying to extract Audio bit-correct from CD to a HDR if complete frames are dismissed when 44.1kHz synchronizes to 192kHz (factor 4.353741497......)

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The board just need data with bitclock, no other input clocks needed. There is a Si514 precision programmable clock generator. The STM32 uC will measure input clock and adjust the Si514 as needed, with data buffered in FIFO, resulting in low jitter bit perfect audio data no matter the input....
From this quote in #34 I assume, that You switch the clock rate of the DAC, depending on the clock of the incoming signal.
Which means You are doing īlinearī, or better said īevenī, upsampling (times 1, 2,4,8, etc.) in the FPGA and run the DAC-Core NOS?
Thatīd be great and Iīm certain that itīd result in considerable sonic improvement, as it also improves the outcome with Sigma-Delts-Cores.
If You do it rather the common way of standard uneven upsampling to a single clock rate, You may waste a thought about the alternative

jauu
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Old 23rd July 2014, 10:40 AM   #57
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Me too for 0.002 or 0.001

Firmware is crucial to implement a good filter, which is really what makes a difference. See the Chord FPGA for example.

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Old 23rd July 2014, 11:29 AM   #58
esgigt is offline esgigt  Netherlands
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Quote:
Originally Posted by soekris View Post
...already having the STM32 and FPGA firmware...
I think I need some update on implementing filters using FPGA..

Anyone a good suggestion on what to read?
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Old 23rd July 2014, 11:32 AM   #59
soekris is offline soekris  Denmark
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Calvin,

We can agree that the best Sigma-Delta DAC's are not bad at all, but I'm in pursuit of the absolute best, like so many other here :-)

The R-2R DAC don't really care about the clock frequency, so any oversampling will of course be even, no reason to mess with things, but as it also will be very configurable you can select any even oversampling rate you want (up to hardware limits), or none....
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Old 23rd July 2014, 12:05 PM   #60
Voysto is offline Voysto  France
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+1 for the 0,01% (or 0,02%)
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