USB to I2S 384Khz - DSD Converter

[charly chile]

I use Buffalo III, with amanero.
My understanding is that :
- you get worse jitter rejection setting PLL in the highest direction.
- it Is easier to get unlocks at higher sampling rate content
- also Buffalo DAC tends to have random unlocks that decrease with warm up.

In my experience I like the sound of the dac, and I think it sounds better with amanero than with toslink.
I am not very happy with the unlock issue, I rather listening to lower sample rate content than getting The PLL input worse.

I think it is a buffalo thing, more than something about amanero.

[glt]

Yes, in theory you get worse jitter rejection with higher DPLL bandwidth
Yes, it is easier to get unlocks with higher sampling rate
Yes, the "random" unlocks decrease with warm up

You can solve by setting DPLL to "best" (although no one really knows what "best" is)

It is a Sabre32 chip thing rather than a "Buffalo thing"

[charly chile]

Hi GLT,

If is a Sabre32 thing, can it be improved with a better source?
Do you know if Ian's reclocking DIY kit solves this problem?
Does using an arduino controller improves the situation?
Can you ear sound degradation when playing with de PLL setting, beside unlocks?


Best

[Malvin]

+1 GB4

[glt]

Originally Posted by charly chile

Hi GLT,

If is a Sabre32 thing, can it be improved with a better source?
Do you know if Ian's reclocking DIY kit solves this problem?
Does using an arduino controller improves the situation?
Can you ear sound degradation when playing with de PLL setting, beside unlocks?


Best

Improved but not eliminated with better source. But can be eliminated by feeding the clock from the source. Ian's recloking does that well. (You disable the clock in Buffalo and feed the clock from the FIFO clock board.
The arduino controller "can" improve the situation by letting you choose the DPLL bandwidth. If you set it to "BEST", then there is no unlock problem
No one (that I know off) have reported sound degradation with DPLL settings, but people have reported sound improvement with synchronous operation

[charly chile]

Thanks for your views!

[gioz]

Originally Posted by glt

Likely. How were you using the BII before? SPDIF input? SPDIF works with the DPLL set at "lowest"

With spdf input without problems, whit audiowidget (I2s) I've some problems, I hope to solve with amanero ;-)

[themystical]

Originally Posted by glt

The arduino controller "can" improve the situation by letting you choose the DPLL bandwidth. If you set it to "BEST", then there is no unlock problem
No one (that I know off) have reported sound degradation with DPLL settings, but people have reported sound improvement with synchronous operation

I have played around with the settings of the various parameters that can be changed in the Sabre chip and the only ones that seem to make any audible difference subjectively appear to be the DPLL Bandwidth settings.
In my system, subjectively the sound appears to get thinner and bass reduced as I go from the highest DPLL Bandwidth to the Lowest but clarity and focus seem to remain unchanged. May be additional jitter manifests itself subjectively as more bass? Strange I know this is a bit off-topic but are there any other subjective experiences out there?

[RayCtech]

Originally Posted by themystical

I have played around with the settings of the various parameters that can be changed in the Sabre chip and the only ones that seem to make any audible difference subjectively appear to be the DPLL Bandwidth settings.
In my system, subjectively the sound appears to get thinner and bass reduced as I go from the highest DPLL Bandwidth to the Lowest but clarity and focus seem to remain unchanged. May be additional jitter manifests itself subjectively as more bass? Strange I know this is a bit off-topic but are there any other subjective experiences out there?

I would expect you are running either a 80 or 100MHz clock...
With synchronous master clock the DPLL and jitter remover settings have little or no impact on the fidelity in my setup.
Quantizer and filter settings are the ones that matters for fidelity...

Lower jitter = deeper bass and better defined bass.
Thus I expect your system may have jitter or noise issues.

[themystical]

Originally Posted by RayCtech

I would expect you are running either a 80 or 100MHz clock...
With synchronous master clock the DPLL and jitter remover settings have little or no impact on the fidelity in my setup.
Quantizer and filter settings are the ones that matters for fidelity...

Lower jitter = deeper bass and better defined bass.
Thus I expect your system may have a jitter issues.

Perhaps deeper, better defined bass is perceived by me as less bass.
There probably are noise issues (in the electronic measurement sense) in my system as I use a lot of valves including in the output stage of the DAC
Yes running with a 80MHz clock. Not yet tried synchronous but probably worth exploring.
As a matter of interest, which quantizer setting gives you the best subjective fidelity. Does this align with 6bT apparently giving the best theoretical SNR and THD? What filter settings do you use?