No, I think that that cyanide capsule overvoltage protection circuit might have something to do with it...
Hello Bruno
Sorry to bore with a question on the ESS dac but you mention that the dac becomes transparent only when all the clocks lock together. What do you mean by this , should the upsampling rate be a multiple of the incoming rate when using the SRC in the chip or are you referring to the PCM filter roll off characteristics.
From their white paper, (Technical Details of the Sabre Audio DAC)
The Sabre DAC rate converter has two advantages compared to the
poly-phase filter approach and is described in great detail in
the pending patent. Firstly the rate conversion is unlimited –
allowing the Sabre to always achieve a conversion into its .
exceptionally high clock rate (as much as 40Mhz) from as
little as 4Khz in one step; and secondly, the process is
essentially perfect to the bit level – the output DNR exceeds
175dB and the THD is correspondingly high.
Regards
Arthur
I think it's only legal to install those after the same customer sends us a fully working module back for repairs twice, and then only after they ask whether the faston tab marked "GND" on the UcD module was supposed to go to mains earth.
(It happened last week. Your suggestion of cyanide capsules has been duly noted)
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@Arthur I think it would take us off topic to discuss in detail. ESS's claims regarding the SRC pertain to the actual interpolation process. They have done an absolutely splendid job there. The thing that causes problems is the ratio estimator (the bit that works out exactly what sampling time to interpolate). The bandwidth is too high which lets through time quantization errors. The circuit samples the incoming clock signal using its reference clock. This results in the addition of jitter with a peak-to-peak value of one reference clock period (e.g. 25ns for a 40MHz reference clock). Next the number of ref clock periods in one input clock cycle are counted and this constantly changing number is fed into a low-pass filter which outputs a cleaned-up version of the ratio between the reference and input clocks. This ratio is then used to space the "virtual resampling points" calculated by the interpolator. Of course the low pass filter doesn't output pure DC. The spectrum of the counter output consists of mix products between the two clocks. The filter can only attenuate those. The attenuated spectrum shows up as close-in FM sidebands exactly like jitter. DNR and THD measurements ignore those. The SRC successfully removes high-frequency jitter, thus guaranteeing good SNR, but it adds low-frequency phase modulation of the signal that wasn't even present in the input clock. All SRC's do this but the bandwidth of the low-pass filter determines whether this is an issue or not.
The attached two measurements were made on a standalone test chip for the ESS SRC which was never issued as a product, but the actual SRC did go on to be used in the Sabre DAC.
The attached two measurements were made on a standalone test chip for the ESS SRC which was never issued as a product, but the actual SRC did go on to be used in the Sabre DAC.
Attachments
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Bruno
any feedback/update on the 'connecting a charged SMPS600 to an nc400' posts that appeared earlier in the thread?
I'd like to follow a modular approach to the cases which would mean and interconnect between psu and amp modules - but I won't do this if I may run into accidental problems with disconnection
Thanks
any feedback/update on the 'connecting a charged SMPS600 to an nc400' posts that appeared earlier in the thread?
I'd like to follow a modular approach to the cases which would mean and interconnect between psu and amp modules - but I won't do this if I may run into accidental problems with disconnection
Thanks
Yes. It's not a simple retrofit unfortunately. All dangerous connection sequences involve either or both of the Vaux rails being connected alongside with one of the high voltage rails and no ground. I can see my way clear of modifying the design for this, but modifying existing units looks difficult, at least if it's to be done in a tidy manner. The closest thing I can think of would be a pair of unidirectional TVS diodes from the two Vaux pins to ground - if they survive having the SMPS output caps being discharged across them.
I think the wisest thing for users who really must power up the smps without the amplifier attached is to discharge the smps after doing so.
I think the wisest thing for users who really must power up the smps without the amplifier attached is to discharge the smps after doing so.
Does that mean you're intending a future iteration of the modules with this modification in place?
Considering that the current batch has sold out it's likely going to be the next.
So as long as I keep the SMPS and the amplifier connected, the 10 minute rule mentioned in the manual applies? If that is the case wouldn't it be wise to mention it in the SMPS600 manual for the current revision of the power supply? Not all know this and not all read this forum and some may miss piece of information. And in the future the SMPS600 boards might change owner and the new owner may be do not know this and might hurt himself.
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The "10 minute rule" (or the requirement that you discharge the caps) only applies when somehow the supply was powered up without the amp attached. If you just wire them up before powering up there's no rule.
When someone builds a regular linear amplifier and one tests the supply without the amp, I should think it normal for them to discharge the caps before continuing as well. What's so mysterious about it?
Another item I'd like to add is that when you draw sparks when plugging the connector in, you're also seriously damaging the connector which isn't engineered for this. You need quite special terminal materials and plating for that. There's no way you can design around that. I can probably prevent the module from becoming unoperable after an accidental hot-plug but I can't possibly prevent all damage. So I will have the manual updated to reflect this.
When someone builds a regular linear amplifier and one tests the supply without the amp, I should think it normal for them to discharge the caps before continuing as well. What's so mysterious about it?
Another item I'd like to add is that when you draw sparks when plugging the connector in, you're also seriously damaging the connector which isn't engineered for this. You need quite special terminal materials and plating for that. There's no way you can design around that. I can probably prevent the module from becoming unoperable after an accidental hot-plug but I can't possibly prevent all damage. So I will have the manual updated to reflect this.
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I am just trying to clear out things, so nobody gets hurt or in worst case accidently dies just because he did everything mentioned in the manual, but didn't do something not mentioned there, such as discharge the power supply, which is procedure apparently known by "every" DIYer except me and not mentioned anywhere. My sole purpose of finding out how to exactly handle the SMPS600 without dying. Nothing more.
I thought the 10 minute rule also applied when the SMPS600 is connected to nc400 module. So, that is not the case and that is now cleared out.
I thought the 10 minute rule also applied when the SMPS600 is connected to nc400 module. So, that is not the case and that is now cleared out.
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Ah sorry I thought you were referring to the amp plugging discussion (others were). Yes as far as the primary capacitor is concerned, indeed you should wait sufficiently long before touching any part of the primary circuit. That is a matter of personal safety.
Sorry for the delay in getting my review up. I was only able to listen for a few minutes last night by the time I got the ncores installed in my main system. One module had a loose cap which was causing noise at idle and it took me awhile to troubleshoot. I will be able to do some extended listening today and get a post up. My initial impressions are extremely positive.
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