Pafi said:
Not as seen from the 340V primary side of SMPS switching transformers. For example, I got 16uH from a 3E25 material 36mm OD, 23mm ID, 15mm H toroid with a 44 turn primary (and a shorted 4 turn secondary) intended to operate at an absolute minimum of 45Khz (before saturation arises) and with a practical power rating somewhere around 1000VA. Primary current was taking one whole microsecond to be flipped from -10A to +10A with 320V applied.
He seems to be using similar transformers. Cores may be bigger and turn counts lower, thus yielding lower inductance figures, but the phenomena is still the same.
Sorry Eva...Try the 3F3 material, lot more suited for switching application, simulate 30 turn in primary....Lose is bit higger, but try it, you will see something interesting!
Fredos
www.d-amp.com
Fredos
www.d-amp.com
I know, 3E25 is a ferrite intended for signal transformers. Power materials ask for at least 30% less turns (thus halving leakage inductance) but I have a lot of these toroid cores that I bought very cheap some time ago and I play with them from time to time 
High frequency power materials are very expensive.
For serious designs in that power range I'm using E42/21/20 in N27 material instead. That produces 8uH in a 340V 30Khz transformer good up to around 800VA with a simple two layer sandwitching approach (far better than the toroids).
p.s. Concerning magnetic snubbers, you'll have to find out by yourself, and be careful because the most obvious class D applications are covered by patents that will still take some time to expire
High frequency power materials are very expensive.For serious designs in that power range I'm using E42/21/20 in N27 material instead. That produces 8uH in a 340V 30Khz transformer good up to around 800VA with a simple two layer sandwitching approach (far better than the toroids).
p.s. Concerning magnetic snubbers, you'll have to find out by yourself, and be careful because the most obvious class D applications are covered by patents that will still take some time to expire
Hi,
Fredos, If I were you I would seriously look if WO2004001960 patent application does not violate your intelectual property. From your description I would say it does. (phase shifted primary full bridge and synchronous rectification of resulting BD modulated secondary signal) Only difference is that patent application uses center tap secondary but full bridge is covered also.
BTW Eva, patent is based on a working circuit.
Best regards,
Jaka Racman
P.S. All this ampliverter stuff is really based on US4479175 from 1984.
Fredos, If I were you I would seriously look if WO2004001960 patent application does not violate your intelectual property. From your description I would say it does. (phase shifted primary full bridge and synchronous rectification of resulting BD modulated secondary signal) Only difference is that patent application uses center tap secondary but full bridge is covered also.
BTW Eva, patent is based on a working circuit.
Best regards,
Jaka Racman
P.S. All this ampliverter stuff is really based on US4479175 from 1984.
Not too big.
Let's estimate: cross-section of leakage field is max. 2 cm^2. Average lenght is about 8 cm. Al=0,0002/0,08*1,2*10^-6=3nH/turns^2, L=6 uH, maybe 50 % more. Am I wrong? Maybe your winding scheme was not enough homogenous.
But fredo's trafo operates on 125 kHz if I understand well. I think it can have only 12-15 turns, and maybe can have a tighter coupling too. I think less than 1 uH leakage can be achieved easily. With interleaved coils it can be even better. (There is such wire with thin isolator wich can withstand 3,5 kV, so it is possible.)
I agree, phenomena is the same, but 5 uH is exaggerating. 1 uH ruins efficiency as well.
OFF: Could you (are you allowed to) tell me what kind of current sensor do you use in your average current mode controller? I have a similar task, and the LTS25 current sensors I wanted to use are much too noisy. Do you have any idea with excellent CMRR, and high precision?
Tekko:
No, I mean the same stuff patented a dozen times with a dozen minor and not relevant changes. Particulatly, USA patent system seems to approve anything if you pay their gentle bill.
You forgot one very important fact. Leakage inductance is doubled because primary and secondary appear in series. When you apply a short to the secondary, the primary is not being coupled to a perfect short, but to a short in series with the leakage inductance of the secondary, and vice-versa.
Thus, 12uH comes very close to the value I measured (taking into account that in a toroid some flux always leaks though the gaps between turns, particularly if primary turns are too spaced and there are no secondary turns near (by the way, that's the reason why a bigger toroid with less turns does not solve the problem at all, but a EI core with sandwitching does).
It's really hard to get tight coupling with low turn counts in toroids, particularly when secondary turn count is not close to primary turn count.
It may seem silly but I'm currently using plain .010 ohm and 0.020 ohm metal shunts and compensating leakage inductance with RC filtering applied to the sensed signal. I mean these:
http://eva.eslamejor.com/I_SHUNT0.JPG
http://eva.eslamejor.com/I_SHUNT1.JPG
Of course, there are much better places to measure current than at the noisy source of some corss-conducting MOSFET (namely at output inductor and capacitor).
No, I mean the same stuff patented a dozen times with a dozen minor and not relevant changes. Particulatly, USA patent system seems to approve anything if you pay their gentle bill.
Pafi said:
You forgot one very important fact. Leakage inductance is doubled because primary and secondary appear in series. When you apply a short to the secondary, the primary is not being coupled to a perfect short, but to a short in series with the leakage inductance of the secondary, and vice-versa.
Thus, 12uH comes very close to the value I measured (taking into account that in a toroid some flux always leaks though the gaps between turns, particularly if primary turns are too spaced and there are no secondary turns near (by the way, that's the reason why a bigger toroid with less turns does not solve the problem at all, but a EI core with sandwitching does).
It's really hard to get tight coupling with low turn counts in toroids, particularly when secondary turn count is not close to primary turn count.
It may seem silly but I'm currently using plain .010 ohm and 0.020 ohm metal shunts and compensating leakage inductance with RC filtering applied to the sensed signal. I mean these:
http://eva.eslamejor.com/I_SHUNT0.JPG
http://eva.eslamejor.com/I_SHUNT1.JPG
Of course, there are much better places to measure current than at the noisy source of some corss-conducting MOSFET (namely at output inductor and capacitor).
Jaka Racman said:
I'm sorry but you don't seem to understand transformer leakage inductance. The energy is stored in the windings and will be dumped to the secondary in form of avalanche as soon as it changes state, no matter if you short the primary or apply voltage to it. You have to model it in your mind as an ideal transformer having one leakage inductor in series with each of its windings. Think about it.
Yes, this is what I tried to count. Why should I double? Inside the primary there is no flux, outside the secondary there is no flux, only between the two windings (theoretically). Practically whole flux is divided to two half, one named by primary leakage, other by secondary leakage, but I computed the sum of them.
Yes, this is what i referred as not homogenous winding. Almost homogenous winding can be made even at a single turn by dividing it to many turns equally distributed along circumference, and paralelling at the ends. (OK, at 1 turn its very dificult to paralell them, but at 4 turns it works fine.)
Current sensor: OK, thanks, I take shunts, its already done, but they will be on the outputs (or on the supply inputs), with 100-150 V of common mode voltage. I have to convert differential voltage to ground referred, with 1-2 mV error. I can't place shunts on the GND, because load is bridge tied.
Hi,
Eva, as you wrote somewhere one needs to be quite explicit to make you understand. Leakage inductance of course exists, but it is not a problem, since you apply negative dead time (overlap) to the synchronous rectifiers. This helps to demagnetize leakage inductance a bit especially at low modulating index. Remaining energy in the leakage inductance then resonates with switch capacitance, but since it starts from zero volts like in every single switch forward or flyback converter or even push-pull it is perfectly manageable.
And before I hear comments on suitability of mentioned converters only for low power:
My very first job assignement was reverse engeneering of a 10kW portable welding inverter. It had push-pull converter operating fom rectified 3 phase mains voltage using a number of paralleled high voltage transistors (BU209 IIRC). Today you would never try to implement such a design, but 25 years ago that was state of the art and it actually worked although transformer had huge leakage inductance.
Best regards,
Jaka Racman
No lumanauw, indeed I use the said prototypes to play audio most of the time It's funy to know that you are listening to the output of a SMPS.
Jaka:
You are still missing the point. Leakage inudctance is not a problem as long as you find out ways to energize it quickly and then return the stored energy to the power supply instead of dissipating it in power devices. Furthermore, bipolar transistors are almost not tolerant to avalanche (yet I like them and I still use them), so no doubt there had to be a lot of clever approaches in that circuit that you mentioned.
Imagine that +10A are flowing both through the output inductor and through transformer leakage inductance as seen from the secondary side. After changing the state of the bidirectional switches we would have effectively +10A and -10A flowing through both inductances in opposite directions, so both will tend to pull the voltage in the same direction until some limiting factor appears (avalanche).
The time required to reverse current flow in the leakage inductance would be exactly:
t = L * (10A + 10A) / V
Where L is leakage inductance and V is the integral of the voltage waveform applied.
One of the logical consequences is that either shorting the primary or the secondary only contributes to delay current reversing, as an inductor with less volts applied will retain the current flowing in it for quite a longer time. We can short the secondary and apply the reset voltage from the primary side, but that will be slow and will cause avalanche anyway because it's just not possible to turn off the switches exactly at the instant where the current flowing through leakage inductance has reached the target value.
Consider that in TV sets 1500V are being applied (in a resonant fashion) to the horizontal deflection inductor during a couple of microseconds in order to reverse current flow in it...
Also, the amount of energy stored in switching device capacitances is ridiculous in comparison with the energy stored in transformer leakage inductance, particularly when dealing with IGBTs whose output capacitances are in the range of a few dozens picofarads.
In short, the proposed circuit calls for active clamping in the secondary side.
It's funy to know that you are listening to the output of a SMPS.Jaka:
You are still missing the point. Leakage inudctance is not a problem as long as you find out ways to energize it quickly and then return the stored energy to the power supply instead of dissipating it in power devices. Furthermore, bipolar transistors are almost not tolerant to avalanche (yet I like them and I still use them), so no doubt there had to be a lot of clever approaches in that circuit that you mentioned.
Imagine that +10A are flowing both through the output inductor and through transformer leakage inductance as seen from the secondary side. After changing the state of the bidirectional switches we would have effectively +10A and -10A flowing through both inductances in opposite directions, so both will tend to pull the voltage in the same direction until some limiting factor appears (avalanche).
The time required to reverse current flow in the leakage inductance would be exactly:
t = L * (10A + 10A) / V
Where L is leakage inductance and V is the integral of the voltage waveform applied.
One of the logical consequences is that either shorting the primary or the secondary only contributes to delay current reversing, as an inductor with less volts applied will retain the current flowing in it for quite a longer time. We can short the secondary and apply the reset voltage from the primary side, but that will be slow and will cause avalanche anyway because it's just not possible to turn off the switches exactly at the instant where the current flowing through leakage inductance has reached the target value.
Consider that in TV sets 1500V are being applied (in a resonant fashion) to the horizontal deflection inductor during a couple of microseconds in order to reverse current flow in it...
Also, the amount of energy stored in switching device capacitances is ridiculous in comparison with the energy stored in transformer leakage inductance, particularly when dealing with IGBTs whose output capacitances are in the range of a few dozens picofarads.
In short, the proposed circuit calls for active clamping in the secondary side.
Hi,
here is a plot from simulation of the posted patent application. Shown is voltage across bidirectional mosfet synchronous rectifier and output filter current.
Eva, you might take a guess which spikes are due to the synchronous rectifier commutation and which spikes are due to the primary commutating at 8ns (unrealistically high speed). Secondary switches modelled are Si4490DY mosfets and transformer data (6:1:1 winding ratio, 720uH primary inductance and 900nH primary leakage) reflects actual Payton EELP32 planar transformer that I use.
Best regards,
Jaka Racman
here is a plot from simulation of the posted patent application. Shown is voltage across bidirectional mosfet synchronous rectifier and output filter current.
Eva, you might take a guess which spikes are due to the synchronous rectifier commutation and which spikes are due to the primary commutating at 8ns (unrealistically high speed). Secondary switches modelled are Si4490DY mosfets and transformer data (6:1:1 winding ratio, 720uH primary inductance and 900nH primary leakage) reflects actual Payton EELP32 planar transformer that I use.
Best regards,
Jaka Racman
Attachments
The plot shows plenty of 200V spikes exceeding the voltage rating of the switches and causing avalanche. All the spikes are due to leakage inductance. If you model an ideal transformer they all will disappear.
The plot also tells me that you are not using phase shifted modulation but just shorting the primary during the dead time as in a plain SMPS. That would correspond to "class BD" and the plot shows the negative consequences in form of current slewrate limiting and very narrow pulses at the end of the cycles. Indeed. that kind of operation produces the narrowest pulses for the smallest signal levels (being pulse skipping unavoidable), as opposed to the typical class D operation that produces the shortest pulses just near clipping. In practice, that means that BD operation yields the highest distortion, quantization artifacts and noise for the lowest signals (audio details!), while class D operation yields the opposite. Also, pulse skipping causes further quantization and jitter errors, the same errors that can be seen when a class D system enters and leaves clipping.
The plot also tells me that you are not using phase shifted modulation but just shorting the primary during the dead time as in a plain SMPS. That would correspond to "class BD" and the plot shows the negative consequences in form of current slewrate limiting and very narrow pulses at the end of the cycles. Indeed. that kind of operation produces the narrowest pulses for the smallest signal levels (being pulse skipping unavoidable), as opposed to the typical class D operation that produces the shortest pulses just near clipping. In practice, that means that BD operation yields the highest distortion, quantization artifacts and noise for the lowest signals (audio details!), while class D operation yields the opposite. Also, pulse skipping causes further quantization and jitter errors, the same errors that can be seen when a class D system enters and leaves clipping.
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