New DAC from Allo ESS9028Q2M for RPI
Hello to all,
In the last few months , we have been hard at work to design our next generation of DAC.
Our last DAC (the Boss) has been received very well by this community but we knew that IC its limited for true hifi sound.
As many of you know , at allo.com we don't do things by the book (or datasheet). So we looked first at ICs. Cirrus , PCM family, AKM and finally the Sabre
They all have (from a design point of view) their advantages and disadvantages. Some need specific voltage to work at full potential (akm) some are closed source (ess sabre) some are clearly not good enough.
So with a myriad of choices and decisions, we finally stopped at ess sabre 9028q2m. Good voltages , good paper numbers but bad (for drivers), Most importantly , this new family from ESS allows master codec.
You see, ALL implementation of ess sabre IC are in fact ASRC . This way , the design reject jitter but of course they lose some definition from original file. The Sabre people are really good at it (so better jitter wins over losing some definition)..but we think we can do it better.
1. Our design will use master codec therefore preserving 100% of definition and jitter will be reduced (like in our Boss) to below 0.5ps with careful layout of clocks and power.
Then we took a lot of output stages... You have 2 choices , voltage or current. The difference (thd+n) is small ...but its there. So we chose the better one. New problem..Vout is asking for 1 opamp(channel)...current needs 3. So 6 opamps....what op amps to chose.
You see...there are 3 things important to make a great DAC . Power + Analog stage= 1 and DAC ic=2. (in that order)
Since we are at analog stage we considered this to be crucial.
2. Analog stage of our DAC is discret . Sparkoslab and allo entered a partnership to bring the sound of Class A opamps to you.
At last..the driver. Its closed.So we got a very decent microcontroller that has the closed source driver. That micro controller communicates with the opensource driver thus allowing DAC control. Everything ..
The design and placements are over. We expect this new DAC to be released around end of Sep (not set in stone). We expect this new DAC to cost way below 200$ (but we will keep it as a surprise until release day). Every lesson was incorporated into this new DAC (like heavy use of film capacitors with the correct values...)
Any questions ?
Hello to all,
In the last few months , we have been hard at work to design our next generation of DAC.
Our last DAC (the Boss) has been received very well by this community but we knew that IC its limited for true hifi sound.
As many of you know , at allo.com we don't do things by the book (or datasheet). So we looked first at ICs. Cirrus , PCM family, AKM and finally the Sabre
They all have (from a design point of view) their advantages and disadvantages. Some need specific voltage to work at full potential (akm) some are closed source (ess sabre) some are clearly not good enough.
So with a myriad of choices and decisions, we finally stopped at ess sabre 9028q2m. Good voltages , good paper numbers but bad (for drivers), Most importantly , this new family from ESS allows master codec.
You see, ALL implementation of ess sabre IC are in fact ASRC . This way , the design reject jitter but of course they lose some definition from original file. The Sabre people are really good at it (so better jitter wins over losing some definition)..but we think we can do it better.
1. Our design will use master codec therefore preserving 100% of definition and jitter will be reduced (like in our Boss) to below 0.5ps with careful layout of clocks and power.
Then we took a lot of output stages... You have 2 choices , voltage or current. The difference (thd+n) is small ...but its there. So we chose the better one. New problem..Vout is asking for 1 opamp(channel)...current needs 3. So 6 opamps....what op amps to chose.
You see...there are 3 things important to make a great DAC . Power + Analog stage= 1 and DAC ic=2. (in that order)
Since we are at analog stage we considered this to be crucial.
2. Analog stage of our DAC is discret . Sparkoslab and allo entered a partnership to bring the sound of Class A opamps to you.
At last..the driver. Its closed.So we got a very decent microcontroller that has the closed source driver. That micro controller communicates with the opensource driver thus allowing DAC control. Everything ..
The design and placements are over. We expect this new DAC to be released around end of Sep (not set in stone). We expect this new DAC to cost way below 200$ (but we will keep it as a surprise until release day). Every lesson was incorporated into this new DAC (like heavy use of film capacitors with the correct values...)
Any questions ?
So the DAC is the master clock for the I2S interface but not the clock for the SBC itself?
Can the board also be configured with the SBC as I2S master? In my case, data is not coming from the SBC, it is only being passed through the SBC and is coming from another computer and sent at whatever that computer thinks is the "correct" rate. Eventually this could starve or overflow the buffering on the SBC, or at least that is my concern...
That's why I use USB ES9023 DACs. Their jitter eliminator (well, reduction at least) kicks in and the USB clock can be synchronized with an external clock. This whole jitter thing is totally overhyped anyway, IMO. To me, jitter is only audible when it is very, very bad indeed. But that is the subject for another thread alltogether!
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You mean that you've done a 3-story high DAC HAT?
Cudos on this design.. It sounds like you're made some very proper design choices..
If I'm seeing correctly, the 9028Q2M supports DSD but does not support DoP. Have you considered (somehow..) supporting native DSD input, like from Ian's isolator board?
You mean that you've done a 3-story high DAC HAT?
Cudos on this design.. It sounds like you're made some very proper design choices..
If I'm seeing correctly, the 9028Q2M supports DSD but does not support DoP. Have you considered (somehow..) supporting native DSD input, like from Ian's isolator board?
Hello DimDim
yeap we had to do it 3 story high. The DAC is connected to i2s so no DSD..checking for DOP (I assumed its compatible)
In any case the design was very complicated , we used lots of LDOs and filtering on both 3.3v , 1.2V and + - 15V (for opamps) . Placement was difficult , but by using 3 decks we separated dirty grounds from clean grounds (not isolated)..and we placed the powers on proper places. Like I said...difficult.
In the end we think that this DAC will exceed most commercial offerings in SQ (up to 1k)
Lets see if we will reach our target.
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the 9028 is running in synchronous mode with some excellent clocks on it (new NDK clocks). No ASRC. This DAC runs in master mode. I think we will be the first ones
The 15v , we are using a convertor , with chokes before and after (+ filters and LDOs) , with metal enclosure to stop EMI . This DC/DC convertor is placed on one of the stacks to reduce coupling the noise as much as possible. (far away from analog )
Like I said.. was very hard to design .
The 15v , we are using a convertor , with chokes before and after (+ filters and LDOs) , with metal enclosure to stop EMI . This DC/DC convertor is placed on one of the stacks to reduce coupling the noise as much as possible. (far away from analog )
Like I said.. was very hard to design .
You mean that you've done a 3-story high DAC HAT?
Cudos on this design.. It sounds like you're made some very proper design choices..
If I'm seeing correctly, the 9028Q2M supports DSD but does not support DoP. Have you considered (somehow..) supporting native DSD input, like from Ian's isolator board?
One thing its not clear...why use hardware DOP when you can have software DSD to PCM (not DOP) direct ? I understand not everyone supports the feature but is there any advantage in the hardware (fpga) ?