• Disclaimer: This Vendor's Forum is a paid-for commercial area. Unlike the rest of diyAudio, the Vendor has complete control of what may or may not be posted in this forum. If you wish to discuss technical matters outside the bounds of what is permitted by the Vendor, please use the non-commercial areas of diyAudio to do so.

Mr White's "Opus", designing a simple balanced DAC

Jump to Latest
#703
ezkcdude said:
I knew that gmarsh (who's well-respected around here) had some advice about AD1896 vs. SRC4192, and I finally found the thread I was trying to recall:

http://www.diyhifi.org/forums/viewtopic.php?p=17611&sid=629922b860731e5c146fd309a51b2adc#p17611

If you're reading this, I'd love to know if you still feel AD1896 prevails, or have things changed?
Click to expand...


Yes I already read that, thread. As informative as it is, I still don't find it definitive.

I think if you look at the low levels we are talking about (-130 to -140db, well beyond the capabilitied of the PCM1794 or WM8740) what one would need to do to eliminate much larger distortion factors in a finished application would be to test the ASRC on its own with varying degrees of jitter on the input while looking at the jitter that makes its way to the output PCM via something that can measure PCM like an AP System Two Cascade or Cascade Plus. 🙂

With either chip the jitter should be so strongly attenuated (even under very bad circumstances) that anything left would be swamped by the distortions and dynamic range limitations of the later stages (DAC I/V etc).

At a minimum even for a listening test, you would want a way to control the jitter, just to correctly frame the test.

I will likely draw on intellectual sources I have in the pro-audio field to help me make a practical effective decision. These people design and produce DAC and digital distribution equipment for a living. I am just having fun. 🙂

I can't see carrying both chips, but like I said, bare PCBs would be available to anyone who wants one to play with one or the other or both.

Cheers!
Russ
 
#704
Russ White said:
I can't see carrying both chips, but like I said, bare PCBs would be available to anyone who wants one to play with one.

Cheers!
Russ [/B]
Click to expand...

Right, in the end it doesn't make much difference, because they are pin-compatible. Not much to complain about. I was really wondering whether there is new information out there. It looks like not much has changed on the ASRC landscape recently.
 
#705
Does anyone know of a good resource that explains all of the different stages of a DAC. I often hear I/V (which I'm guessing is current/voltage?) referred to, but I really don't understand what this stage accomplishes. I looked at the DAC entry in wikipedia, but it doesn't get into that much detail. Thanks.
 
#706
What I do know so far, is that of the people I have consulted with (about a dozen so far) the BB part has a huge lead in terms of confidence. only two of the dozen I have asked said they would prefer the AD chip. Those two though said they really have no particular reason for saying so. Just that they know it works. 🙂

A few have spoken well of the newer CS chip too, and it actually does look very very good(in a lot of way better than both the other chips). In fact a few suggested I look at that option instead, and I just might.

Cheers!
Russ
 
#707
m0tion said:
Does anyone know of a good resource that explains all of the different stages of a DAC. I often hear I/V (which I'm guessing is current/voltage?) referred to, but I really don't understand what this stage accomplishes. I looked at the DAC entry in wikipedia, but it doesn't get into that much detail. Thanks.
Click to expand...

Current to Voltage, it's as simple as that. 🙂

There is really only one way to do it, put a load on the current, the load can be active or passive.

Cheers!
Russ
 
#709
m0tion said:
Russ:

Well, ok, but why is it needed? Also, what other stages are there to a DAC? I believe the I/V stage is also optional? What happens if you don't include it?
Click to expand...


There are basically (in the most general terms) two kinds of DACs. Voltage Output, and Current Output.

Chips like the PCM1794 are current output and need an I/V conversion stage (as basic as it may be). A simple resistor to GND is a perfectly adequate I/V as long as it feeds a high impedance.

Chips like the Wm8740 are voltage output and the output can be taken directly from the filter stage, so no I/V stage is required as the output is voltage already.

With both types of DACs sometimes a filter is used after the DAC to remove artifacts beyond the desired audible range.

Cheers!
Russ
 
#711
Russ White said:
A few have spoken well of the newer CS chip too, and it actually does look very very good(in a lot of way better than both the other chips). In fact a few suggested I look at that option instead, and I just might.

Cheers!
Russ [/B]
Click to expand...

I looked at that CS8421 a little bit (and SRC4392). The nice thing about the CS chip is that it is hardware-programmable, unlike the SRC4392. What I don't like is that VD is 2.5 V, in addition to VL being 3.3 or 5 V. This means you need an additional regulator, but since it's on the digital side, maybe that's not such a bad thing. Anyway, you kill two birds with one chip, so to speak. It's a little hard to solder those chips (TSSOP) than the CS8416 (SOIC), but it replaces the also difficult-to-solder ASRC (SSOP) - so that probably evens out, as well. For systems needing multiple SPDIF inputs, the CS8416 has more flexibility, but I'm sure one could easily set up a hardware solution for the CS8421.
 
#716
SRC4192 & friends

Hi,
I'am prototyping a "DAC" with :
PC-CDROM/DVD963--(spdif)-->DIR9001--(i2s)-->SRC4192[Mclk 24.576MHz]--(i2s+Mclk)--->2xPCM1794[Mode monoral]
And for the I/V, actually I use 2 TLE2072 (45V/us) by PCM, and for the voltage/summing I use a OPA2134.

The proto-system is playing fine, since 2 weeks 🙂, and the SRC4192 upsample the 44.1k/16 to 192k/24, with a very nice sound.

I chose the SRC4192, because if you look in the DS for the AD, you can find that :

AD1896 can't be master with a clock>30MHz, and the possibles dividers for the AD1896 clock are 256/512/768, if you make calculation with 30MHz, the maximum FsOut will be :
30000000/256=117187Hz, it's under the 192k that I want.
If you want output 192k from the AD1896, you needs external dividers
as you can find in the EVAL-AD1896EB.pdf document, with a Mclk at 24.576MHz, and the AD1896 in slave mode for the output side.

So, with the SRC4192 the possibles dividers are 128/256/512 !!
and with a clock at 24.576MHz, and a divider of 128, you could have an output at 192k 🙂. I'am using this configuration.

It's my actual understanding of this 2 ASRC, possibly something is wrong !

@+ Thierry
 
#717
hi, j have noticed that you have a new spdif receiver, not only the 8416 but also one based on a a wolfson.

Could you explain the differences, how does it sounf compare to the last one. is it possible to configure it in order to have 32 bit frame (BCK=64xWS)
 
#720
I am searching for a complete DAC to which I would like to ad a transformerbased passive outputstage. The singelended output should go directly through a 10K stepped attenuator to a discrete diamondbuffer set to 6dB gain. Would the Opus DAC with the voltage output Wolfson DAC be a good choice ?

Best regards
Marc Holmström
 
You must log in or register to reply here.
Top Bottom