Mr White's "Opus", designing a simple balanced DAC

[Ulas]

Originally posted by maxlorenz
Plan to--> CDPRO-2M->direct I2S->ALW superregulated 5V (3.3V worries me ) Opus DAC, balanced and DC coupled to-> transformer based volume control->balanced and DC coupled to Hypex UCD400-< Tannoy definition 500. minimalist approach.

Originally posted by Russ White
No worries, to do I2S in (at 5V) simply omit all the receiver related parts including the input trafo and all its associated parts.

It appears neither of you read the datasheet. What makes you think the WM8740 will work with an I2S feed from a CD transport?

[jean-paul]

Please explain why it won't do I2S directly, Ulas.

[Russ White]

Ok guys (especially Jean-Paul) I hope this makes you happy.

Thanks Max, and the rest of you for you help too.

Notice the added optional VREGs(just jumper them if you don't need them) and the inverter for muting the DAC when there is a signal error. Also note the added small value resistors for the clock inputs.

Cheers!
Russ

[Russ White]

Notice I don't have a pin header for "good signal" LED yet, just have not found a good place to put it yet....

[maxlorenz]

Dear Ulas,
No, it's true. I have not read it yet (not that I can fully understand it either). I will, as soon as I recover from my 24hrs guard...
I'll try to understand if it can accept 16bit I2S, Philips format

Dear Russ,
You're welcome we are all trying to learn here...

[Russ White]

[Russ White]

It seems I should connect the two ground planes. Maybe with a Ferrite/inductor and/or a small value resistor,

From WM8740 data sheet it appears that DGND and AGND must be at or very close to the same DC potential.

So whats the best way? A simple resistor/jumper? Or Ferrite/Inductor? Or maybe both....

[Russ White]

I have had a few questions regarding the output. The WM8740 data sheet says that it can drive a load as low as 1K, so if you have a good high impedance stage after the DAC, you should not need any buffer. Even on the evaluation board you can bypass the output op amp circuit which in that case is not really a buffer, but a filter circuit.

My planned chain is this:

DAC --> Joshua Tree attenuator(with about 4K worst case input impedance) -->Twisted Sibling balanced preamp (100K input impedance) --> Twisted X Overture balanced power amp(2.2K input impedance) --> various sundry speakers 4 and 8 ohm.

Cheers!
Russ

[hayenc]

Are you looking to do the AGND to VGND connection like on the eval board? It is a zero ohm resistor under the chip on the reverse side of the board.

[hayenc]

Russ,

Do you expect any problems with the variable input impedance of the JT on Opus?