Hi Russ, i didn't mean synchronous clocking was intrinsically more audiophile but many folk are turning to a usb solution for thier 'audiophile' audio path. I giess this is one of the main reasins for providing easy access to a synchronous clock connection on this new board. My point was really that lots of users also have a dvd player, dab radio, etc that they may still need to plug in without the ability to transport a clock signal. I'd say it was way beyond most of us to make our own multiplexed clock switch! I guess what i'm saying is that i'd love to be able to simply experent with synchronous clocking with this new board, but not at the expense of loosing functionality
buffalo se2 maybe?
Stefan
buffalo se2 maybe?Stefan
Roender - My experience is not the same - but that's not important. I agree both sound excellent, but the word "better" is purely subjective. You can say you think it sounds "better" and that's fine. I don't hold the same opinion, but I don't expect you to share mine either. Do what you like. That's where the fun is anyway.
Do what you like. That's where the fun is anyway.
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Orangeart, you have missed the point. You can already do what you want to do with the Buf III SE. But I tried to explain it is not very practical.
You are just going to need to provide the way to switch out the clocks. Thats part of the fun of DIY.
Perhaps I could create a cool little clock distribution daughter board.
As I said there are system (beyond just inputs into the DAC) changes you need to make to do it right. That part is up to you.
Right now you can switch in as many clocks as you like - 2, 3, 4, 10 It makes no difference. If one of them is Assynch - thats fine too!
You are just going to need to provide the way to switch out the clocks. Thats part of the fun of DIY.
Perhaps I could create a cool little clock distribution daughter board.
As I said there are system (beyond just inputs into the DAC) changes you need to make to do it right. That part is up to you.
Right now you can switch in as many clocks as you like - 2, 3, 4, 10 It makes no difference. If one of them is Assynch - thats fine too!
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Roender - My experience is not the same - but that's not important. I agree both sound excellent, but the word "better" is purely subjective. You can say you think it sounds "better" and that's fine. I don't hold the same opinion, but I don't expect you to share mine either.
Well, at least it will not lose lock, for high resolution sources, in async node if DPLL bandwidth is set to low or lowest
This is not my experience for sources over 24bit 88.2Khz. I have tried this only with I2S input and two different transports: SDtrans and a DVD player.
This is strictly related with DPLL bandwidth set to low or lowest in sync mode and with stock BIII clock oscillator
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When we assume that Buffalo III crystal is good enough already, so why not use it as reference clock?
For such use we need to be able generate clock for 44.1/58/96/... kHz stream and export it as SPDIF clock/Masterclock/Wordclock, so it could be used to as clock reference in the source device, e.g. in the sound card.
Could it work?
For such use we need to be able generate clock for 44.1/58/96/... kHz stream and export it as SPDIF clock/Masterclock/Wordclock, so it could be used to as clock reference in the source device, e.g. in the sound card.
Could it work?
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Do you know a method to generate 24.5760Mhz and 22.5792Mhz from BIII 100Mhz clock and in the same time preserving his phase noise for the mentioned frequencies?
I do not know any other than using a PLL which don't cont because will add a lot of jitter
OK, I don't know. But do we really need to have the precise clock in the source? I guess the information loss during transport might be lower when the source transmits signal with the known jitter, i.e. same as is in DAC. The jitter on the transport would be there, but then it would be eliminated in the ASRC.
In other words I think it might improve quality of data transport, not the timing.
In other words I think it might improve quality of data transport, not the timing.
Miero, it is an interesting idea. One cool thing is that even if the PLL or clock generator had some error, it would be an error that would be in synch with the master clock... And since at the DAC the incoming signal would be resynced to the original master clock... Well the results could be interesting.
Here is the cool thing. if one wanted to they could do it, by using the UFL connector on the B-III SE as an output, instead of an input. Then you have something to feed a PLL/Clock generator
Don't let anyone discourage you from trying it if you have the motivation.
Here is the cool thing. if one wanted to they could do it, by using the UFL connector on the B-III SE as an output, instead of an input.
Then you have something to feed a PLL/Clock generatorDon't let anyone discourage you from trying it if you have the motivation.
I don't want any ASRC .... It is my subjective choice.
In this case is paramount to have a very good phase noise clock in DAC and source as well. Clock must be close to the DAC and divided accordingly with the source needs.
Buffalo-IIIse u.fl connectors
Had some time for building. Here is the Buffalo-IIIse with optional u.fl connectors.
The connector for EXT_MCK will be pre-installed standard. The u.fl connectors for I2S and S/PDIF will be available as an uninstalled option (they are not that hard to solder). As usual, terminal blocks are included in the kits.
The IP_S pads in the foreground control the input switching (S/PDIF or I2S) via a simple switch or digital logic.
Had some time for building. Here is the Buffalo-IIIse with optional u.fl connectors.
The connector for EXT_MCK will be pre-installed standard. The u.fl connectors for I2S and S/PDIF will be available as an uninstalled option (they are not that hard to solder). As usual, terminal blocks are included in the kits.
The IP_S pads in the foreground control the input switching (S/PDIF or I2S) via a simple switch or digital logic.
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