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TPA - USB Transport

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Hi glt,

One of the things the XMOS chip does very very well is clock based IO.

It will be fed from one of two low jitter clocks externally for sample rates that are multiples of 44.1 and 48khz. The processor divides the clock as necessary depending on the sample rate. Only one clock is ever enabled at a time.

The XMOS chip 400Mhz system clock is generated by an internal PLL which is fed by a third 13Mhz clock.
 
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It will be fed from one of two low jitter clocks externally for sample rates that are multiples of 44.1 and 48khz. The processor divides the clock as necessary depending on the sample rate.

May I ask about an I2S Bit Clock generation for 384 kHz/32 bit sampling rate?
In this case its Bit Clock frequency is 24.576 MHz. Is the Bit Clock signal obtained from the I/O module in the processor?

(By the way, I imagine the I/O part of XMOS processor is something like FPGA and its configuration can be programmed in a kind of C language.)
 
I am not going to get into my exact solution at the moment. ;)

Lets just say I will do it in a way the the propagation delay from the device is always the same regardless of the frequency. That's what really matters.

Right now I am only playing such high rates directly from memory. I still need to test if its going to work well in the real world USB tests, and I have a couple of hurdles to clear before I do that.

In all honesty the super high sample rates are *not* my primary design goal. They are something I want but don't require. If it works solidly at 192/24 from USB I will be quite satisfied.

It's just too early to make any promises. :yes:
 
Hi glt,

One of the things the XMOS chip does very very well is clock based IO.

It will be fed from one of two low jitter clocks externally for sample rates that are multiples of 44.1 and 48khz. The processor divides the clock as necessary depending on the sample rate. Only one clock is ever enabled at a time.

The XMOS chip 400Mhz system clock is generated by an internal PLL which is fed by a third 13Mhz clock.

Very nice! If I recall from reading the Spartan FPGA specs, it seems that simple clock division gives the lowest jitter (as compared to using the DCMs). Have you considered dual frequency clocks such as Silicon Labs S530s? spec-wise they are equally good as the small clocks you have used in your other designs.
 
Russ

I am very excited about adding the USB-I2S board to my B-II. My wish list:

1. Async, with lowest possible jitter being the priority
2. Panel mount board, with integrated USB port
3. Power, from the USB bus (properly filtered, and locally regulated as necessary) with option to provide an (single) external PS.
4. Dual, fixed local oscillators, for 44.1 and 48 base frequencies

BTW, right now I am using one of Gordon Rankin's "Wavelinks" to get USB to SPDIF to my B-II, fantastic sound, and trouble free from 16/44.1 to 24/192. He us also using the XMOS chip, but apparently he uses his own code to maximise the performance.

It will be great to ditch the SPDIF and extra box, and get equal (or possibly better) performance with this board inside my B-II. Let me know if you would like me to beta test vs. the Wavelink. I am Mac based, using the current version of OSX.
 
I am using one of Gordon Rankin's "Wavelinks" to get USB to SPDIF to my B-II, fantastic sound, and trouble free from 16/44.1 to 24/192. He us also using the XMOS chip, but apparently he uses his own code to maximise the performance.

I have every confidence that my solution will be no less maximized than Gordon's. I am writing my own code as well, but let be serious here, it is not rocket science. In fact compared to the code I write every day this is child's play. That's why I call it a hobby. :cool:

One thing for sure. It will definitely not cost you $900 to buy our module. :no:

I also think our approach to isolation will be superior to anything I have yet seen. Including the aforementioned unit. :)
 
I have every confidence that my solution will be no less maximized than Gordon's. I am writing my own code as well, but let be serious here, it is not rocket science. In fact compared to the code I write every day this is child's play. That's why I call it a hobby. :cool:

One thing for sure. It will definitely not cost you $900 to buy our module. :no:

I also think our approach to isolation will be superior to anything I have yet seen. Including the aforementioned unit. :)

Russ, sweet to hear that you are confident in the performance of your approach. I hope that TPA will be able to produce enough of these boards to meet the demand!
Thanks for your work on this Russ!
 
Hi Russ,

Awesome news :D
I like what I'm hearing. (with perhaps the exception of no built in provision for trying out other supplies :p)

Am I correct in thinking that by 'host controller with USB storage' you mean that a usb stick can be plugged in, and wav files played back directly?
That would make for a fantastic one-box solution for headphones (transport-> buff2 -> HP)

Can't wait!
 
Hi Russ,

Are you working towards 24 or 32 bit depth?

Pure Music is working on 32 bit software applications that they claim the ESS Sabre DACs are the first true 32 bit DACs that can realise it. It would be nice to able try it out. :)

-Steve

The module itself will support 32bit (at least for I2S output as SPDIF is inherently limited to 24bit). The only question is will the readily available drivers support it? I will need to test this from the driver end, but there is no hardware or firmware hurdle here.
 
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