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Old 17th August 2011, 05:24 PM   #1511
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Default ASRC...

GLT: there are those who feel an ASRC sounds unnatural. Wavelength Audio uses the ESS chip in synchronous clocking mode for this reason. I have not listened to a synchronously clocked B-II or B-III yet, but I would like to try it and see...
As far as clocking goes, the CCHD clock is pretty nice...of course if one provides an I2S source with an equally good MC, and short, well implemented clock transmission lines, all should be good.
I would like to see a USB-I2S source with CCHD (or similar spec) clocks, and dedicated shunts for the clocks' supplies...hint, hint...
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Old 17th August 2011, 05:35 PM   #1512
glt is offline glt  United States
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barrows,

Absolutely agree.

But since my source clock is generated by the FPGA, there is no way I'm trading that with the CCHD clock.

BTW, I am not too fond of winged Buffaloes (hence I am trying hard to stick with the BII) :-)
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Old 17th August 2011, 05:37 PM   #1513
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There is no "Synchronous clock mode" really You are either using a synchronous clock or your not. This actually only effects the very first part of the digital input and OSF.

I am not against using a synchronous clock. But I would never buy into the hype that anything else sounds "unnatural". Because I know better.
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Old 17th August 2011, 05:44 PM   #1514
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Default Yeah...

Quote:
Originally Posted by glt View Post
barrows,

Absolutely agree.

But since my source clock is generated by the FPGA, there is no way I'm trading that with the CCHD clock.

BTW, I am not too fond of winged Buffaloes (hence I am trying hard to stick with the BII) :-)

If you have a DDS generated clock it is likely best to stick with the onboard CCHD as MC, agreed then. I have also noted that some reputable commercial DAC designers, who previously did not like the sound of hardware based ASRC implementations have actually embraced the ASRC as implemented in the ESS chips: most notably Daniel Weiss. The ESS approach to ASRC does seem to sound better than many others (TI for instance).
I still wonder what the ESS 9018 will sound like synchronously clocked with a ultra low jitter/phase noise I2S MC source... Gotta try at some point.
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Old 17th August 2011, 05:48 PM   #1515
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Quote:
Originally Posted by barrows View Post
I still wonder what the ESS 9018 will sound like synchronously clocked with a ultra low jitter/phase noise I2S MC source... Gotta try at some point.
I would say it sounds absolutely awesome. I have tried it. But the clock does need to be very good. Keep in mind. Things are still internally relocked. Just at an exact multiple.
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Last edited by Russ White; 17th August 2011 at 05:57 PM.
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Old 17th August 2011, 06:03 PM   #1516
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What happens to the filters since they are designed to the internal oversampling?
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Old 17th August 2011, 06:11 PM   #1517
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Quote:
Originally Posted by glt View Post
What happens to the filters since they are designed to the internal oversampling?
They are still oversampling. You don't need to disable OSF.
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Old 17th August 2011, 06:14 PM   #1518
jgazal is offline jgazal  Brazil
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Is it possible to run the ES9018 with a 112.896Mhz clock and then an output signal to run the transport with this same clock?

Sorry if this is something stupid to ask...
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Old 17th August 2011, 06:16 PM   #1519
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I think (don't have it open at the moment) according to the datasheet that might be just a tad too high. But it might work.
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Old 17th August 2011, 06:32 PM   #1520
glt is offline glt  United States
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Quote:
Originally Posted by Russ White View Post
They are still oversampling. You don't need to disable OSF.
I see, in "normal mode". That means the clock must be >192 FS

Suppose the source clock is 192fs. For 352.8KHz material that means 67.733 MHz. That is still below the 80 MHz of the current clock

Suppose the source clock is 256fs. For 352.8KHz material that means 90.316 MHz. That should be high enough to fix the noise problem

However, I seriously doubt my source is generating that frequency for the MCK.

OK, I think I was confusing "synchronous" with OSF bypass (which requires a much lower frequency MCK -only >24fs)

Passing 100Mhz clocks with simple wiring is probably not a diy type of thing :-)
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Last edited by glt; 17th August 2011 at 06:38 PM.
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