A power FET normally has the drain-source diode inherent in it. The existing zener acts in both directions, so no concern there.
The only concern is to add some current limit protection in case a screen fails short. Something as simple as a 3V/0.15A = 22 ohm source resistor may suffice. That may also reduce SOA stress at turn-on.
You would also need to check that input ripple at max loading does not cause the regulator to loose regulation from low input to output voltage differential.
The only concern is to add some current limit protection in case a screen fails short. Something as simple as a 3V/0.15A = 22 ohm source resistor may suffice. That may also reduce SOA stress at turn-on.
You would also need to check that input ripple at max loading does not cause the regulator to loose regulation from low input to output voltage differential.
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