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Old 30th October 2016, 01:02 PM   #1
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Default ST-70 Power supply questions

Hi, I'm in the process of building a st-70 amp. I'm building the power supply on pcb, and i would like to use solid state rectifiers.

Has anybody tried to use a soft start delay on B+? using a mosfet?

I've found the circuit outlined below on a forum i do not remember where. So i have incorporated the design on to my schematic.

Would the mosfet circuit affect the function of the amp in a bad way?

Any thoughts regarding the circuit would be very helpful.

Click the image to open in full size.

Thanks,
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Old 30th October 2016, 01:15 PM   #2
Mooly is offline Mooly  United Kingdom
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Only a couple of seconds work to alter an earlier simulation.

This is what your circuit does with the values you have. I don't think there is any real downside other than losing a few volts across the fet.
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Old 30th October 2016, 01:21 PM   #3
Mooly is offline Mooly  United Kingdom
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Make the 1meg smaller and you have an effective ripple filter. This shows the presence of 20 volts pk/pk ripple at the input. Note how clean the output is.
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Old 30th October 2016, 01:22 PM   #4
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Soft start is a plus. Delayed B+ ( the relay) is without benefit, leave out.
The transistor will need some cooling, a board-mounted heatsink will do.
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Old 30th October 2016, 06:49 PM   #5
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Wow, i have to install LTspice and play with it a little. I've run the simulation with Proteus and it seams there is only about 5v voltage drop. I'll probably use a higher resistor like ~80k for more smooth ramp up curve.

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Originally Posted by petertub View Post
Soft start is a plus. Delayed B+ ( the relay) is without benefit, leave out.
The transistor will need some cooling, a board-mounted heatsink will do.
I thought delaying the HV a little, until the tube heaters are all hot is a good thing too.

On my simulation it seams the vdrop across de fet is only 5v. I don't know if this is the right formula to calculate the power dissipated by the fet, but i did it like this p = (0.250ma x 0.250ma) x 5v = 0.31w.
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Old 30th October 2016, 07:02 PM   #6
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Quote:
Originally Posted by franciscano View Post
Wow, i have to install LTspice and play with it a little. I've run the simulation with Proteus and it seams there is only about 5v voltage drop. I'll probably use a higher resistor like ~80k for more smooth ramp up curve.



I thought delaying the HV a little, until the tube heaters are all hot is a good thing too.

On my simulation it seams the vdrop across de fet is only 5v. I don't know if this is the right formula to calculate the power dissipated by the fet, but i did it like this p = (0.250ma x 0.250ma) x 5v = 0.31w.
Delaying B+ is not needed as for the tubes concern. The only reason could
be to avoid overvoltage of the electrolytics before the tubes start to draw current.
Power delivered in the fet is U x I ( 5V x 0.25A = 1.25W ). Not much but some
heatsink is needed.

Are you planning to produce circuit boards with DC rectifying and softstart?
I could be interested .
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Old 31st October 2016, 09:45 AM   #7
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Quote:
Originally Posted by petertub View Post
Are you planning to produce circuit boards with DC rectifying and softstart?
I could be interested .
I'll be producing the board for myself with the toner transfer method. As soon as it is done i can send the design files if you want them.
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Old 31st October 2016, 10:00 AM   #8
AJT is offline AJT  Philippines
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i use this online calculator for making soft starter using mosfets for dc psu...http://ladyada.net/library/rccalc.html
your switch can be omitted, i see no use for it...
filaments take about 11 secs to warm up, you dimension your r c based on that...
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Old 31st October 2016, 03:27 PM   #9
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The only thing that I see from the circuit is that there is no smoothing (reservoir) prior to the FET. Surely this would give a full wave rectified ripple at the input if it were not for the diode in the FET?

How does this affect the operation of the circuit?
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Old 31st October 2016, 03:57 PM   #10
Mooly is offline Mooly  United Kingdom
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Which circuit are you looking at ? The one in post #1 or the simulation.

Post #1 I took at face value and assumed the 400 v meant 400 volts DC. Whatever was meant or implied, the voltage fed to the FET would be rectified and smoothed and consequently there would have to be a normal reservoir cap of some description.

The simulation is simply simulated ripple as an 'all in one' voltage component. The 20 volts pk/pk ripple was chosen to be so high simply to highlight the effect of the ripple reduction of the circuit.
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