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Old Yesterday, 07:07 PM   #1
BRSHiFi is offline BRSHiFi  United States
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Default Transformer Sizing, etc

In my scanned notes is a basic working of how my curve tracer will operate. I finally found time to get back to it .

I performed some rough calculations trying to figure out the average power dissipation of the B+ supply. I chose for a calculation benchmark a CCS load of 0.5 amps. The unregulated B+ rail puts out around 700V into the PAD195 and IRFPG50 pass mosfet. B- is -100V.

Since the B+ supply puts out a ramp, it will dissipate a constantly changing number of watts depending upon the time. I programmed the device so the ramp takes 2 milliseconds to reach 580 volts (B+ max). Therefore, when the ramp hits 50 volts, the instantaneous dissipation will be 325 watts. At 580 volts, we have 60 watts.

I do not know the method to calculate average power dissipation for a 2ms ramp offset by 100ms. Therefore, I assumed the B+ supply is a square wave putting out 50V, making the regulator dissipate 325W for 2ms. Therefore, I found the average power dissipation to be 7 watts as the duty cycle is 2%.

2ms is a pretty short time, but those numbers still seem overwhelming for that mosfet. The mosfet datasheet says that amount of time, given the range of voltages and the 0.5A benchmark I am within the SOA.

http://www.mouser.com/ds/2/427/91254-104428.pdf

I have a feeling I am missing something in this calculation (I am thinking average power dissipation), so I would appreciate it if someone could possibly set me straight.

Also, how does one size a transformer for the B+ and B- rail for this application? The unregulated B+ has 47uF worth of capacitance across the rail. B- has 22uF.
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Last edited by BRSHiFi; Yesterday at 07:09 PM.
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Old Today, 12:22 AM   #2
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This isn't that hard to figure out, just some basic calculus (attached). The voltage is 46.89VRMS; call that 47VRMS as design nominal voltage.

Since this waveform stays above the centerline at all times, there's also an average of: Vave= 5.67V, as a DC component.

As far as what you've got for power, that depends on the load resistance. As for the PTX specs, that depends on the actual load, the current demand, and whether you decide on a C-input or L-input ripple filter.

The C-input makes better use of PTX voltage, while L-input makes better usage of current carrying ability.

If you're expecting 0.5AP at 580V, that's: R= 580/0.5= 1160R, which gives: 472/1160= 1.9W. The average current will be: 47/1160= 40.52mA -- the value you'd use to design the DC rail supply. That you have such a low duty cycle makes these values so small. The one thing to remember is that the DC rail capacitor needs to be large enough to supply the peak current demand, which you said is 0.5A.

0.5A * 47= 23.5W
23.5 * 2.0E-3= 47E-3 (newton-meters)

W= 0.5CV2

C= 42.55uF (47uf design nominal)
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Last edited by Miles Prower; Today at 12:38 AM.
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Old Today, 05:30 AM   #3
BRSHiFi is offline BRSHiFi  United States
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I did the algebra and paired the equation down to the attached image.

The B+ regulator will dissipate 23.5 Wrms with that waveform running into the load continuously. Assuming 15 curves are drawn into the 0.5 amp CCS load, the waveform will only run for about 1.6 seconds.

That is not enough time for the system to come up to temperature. Also, a tube is not a CCS load. I picked the 0.5 amp as just a reference. So assuming the 0.5A load, what heat sinking do you recommend? I have one on there that can adequately dissipate about 10 watts.
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Old Today, 06:08 AM   #4
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Since your current isn't going to be anywhere close to 0.5A for most of the time, and you'll probably never see that anyway (unless you're curve tracing a big RF power or TV HD type) then heatsinking for 10W should be more than adequate.

It's the behaviour when that ramp drops that I'd be concerned about. A high speed Schotkey reverse biased across the MOSFET would be a good idea, if this diode isn't already included on the die itself (check the spec sheet). Also, a series high speed Schotkey diode in series with the drain of the MOSFET is also a good idea. This should protect against any inductive flyback due to stray inductance. Sometimes, MOSFETs fail due to excessive dV/dt problems, and nothing can prevent it since this happens on die, and nothing external can protect the gate against that. You could consider a slight modification that ramps down instead of dropping suddenly. Say, ramp down over 0.2mS.
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