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Old 12th December 2012, 09:11 PM   #31
rrrs is offline rrrs  United States
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Hi, will try eliminating cathode resistor and compare the result; I do not have a suitable LED at home, but got a 1.55V battery; will connect that in line with the D3a grid, bypassed with 0.01uF cap and 10M resistor, all ahead of grid resistor.
Cathode can then be connected straight to ground.

I seen this method used/recommended by Thorsten, so will give it a try:
"As it happens, our/my “ultimate” version of this concept also uses grid battery biasing (just measure the voltage across the cathode R – I have no notes left – and put suitable batteries in series with the grid, cathode straight to ground. Bypass the battery stack (Lithium Type Coin Cells is what I use) with a silver mica cap of at least 10nF and a 4.7 … 22MOhm resistor.(This is) - not very common because people believe if it is in series with the grid; it is “in the signal path” and if it is in series with the cathode it is not “in the signal path”. So they stick a big, bad, nonlinear rechargeable Nicad Battery in the cathode, where it is exposed to a lot of varying current so this non-linearity can be injected into the input voltage loop (grid to “ground”) and amplified and they are pleased as punch with themselves for having eliminated another evil capacitor ;-).
Instead they could have placed a nice linear primary cell (non-rechargable – lithium is best IMNSHO) in series with the grid, where there is practically no current flow at all (DC and AC will be in nanoampere region, if any) and eliminating any battery discharge noise needs a very small value capacitor...
Keep the 1K Gridstopper as close to the actual gridpin of the 7119. Obviously, negative pole from the battery to grid. Consider using lithium button cells, they have very little added stray capacitance (small size) and will last many years in this application, the ones for LCD wrist watches."

One other interesting detail I noticed: in my original, 3 stage configuration there was a rather large, 10K grid resistor on 211 tube; thinking about it, this would automatically adjust grid voltage as soon as 211 would start to drow grid current; for example at +25V peak 211 would want to draw 8mA grid current, but 10K resistor would right away cause voltage drop till grid is at 0 again and no current flows...
When I changed from original cap coupled to IT coupled driver I eliminated this grid stopper, so now 211 can draw grid current.
I guess, this "current restricting" grid resistor would basically also introduce distortion, so a better way should be to stay without it, but try to get D3a to deliver some grid current when needed. Hopefully removing cathode resistor from D3a, as you suggested would help; will report my findings.
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Old 13th December 2012, 12:22 AM   #32
kevinkr is offline kevinkr  United States
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Looking forward to hearing how you make out. I often use batteries for fixed bias where conveniently applicable. The series grid battery should be fine with a bypass. (See my Muscovite thread for an example of a phono stage with multiple stages using battery bias of various sorts.)
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Old 13th December 2012, 10:08 PM   #33
rrrs is offline rrrs  United States
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Hi, so did change D3a from cathode resistor to battery grid bias, operating at 155V on plate, -1.6V bias (silver oxide battery bypassed with .1uF cap and 10M resistor.
Got actually the same result; distortion of sine wave would happen at about 177Vpp on IT primary / 100Vpp on the 211 grid; 211 bias at -52V; so, just where 211 starts to draw small grid current wave would distort.
One difference with this setup now is that D3a running at less bias starts to distort at around 220Vpp on plate as this is where signal reaches 3Vpp, so it gets D3a grid into positive.
It is nice and easy to see where distortion comes from as it influences opposite peak then on I see on IT secondary.

Then I de-coupled cold end of the IT secondary directly to ground with 50uF cap; prior to that there was a 100K resistor plus part of 20K bias trimming pot between IT secondary and bias decoupling cap.
This change cleaned completely this distortion on secondary and now I can get clean wave up to 220V on primary / 125Vpp on IT secondary (211 grid); this D3a starts to distort as signal starts running it’s grid into positive (I wish one could find button battery with around 2-2.5V; all I found is either silver oxide 1.55V or Li-poly at 3V).

Then, I replaced 50uF cap with 0.47uF and got actually the same result as with 50uF cap; tried at both, 1000Hz and 100Hz sine wave.
I guess, once 211 starts to draw grid current this cap by-passes AC signal to ground which would, with no cap, have to pass through roughly 110K to ground (100K resistor and part of bias pot).

I attached 2 photos, one of wave distortion without this cap (you can see the bottom of the sine wave in the middle that starts distorting; this is on the IT secondary. Vpp is read at this point) and second one with the cap (you can see distortion now happens at higher Vpp and it happens first on IT primary (top of the wave left of the middle); bottom section of the wave on secondary that distorted previously stays clean!

What I am wondering is if there are any negative effects of adding this cap; it is strange that I cannot find this in any IT coupled schematics with fixed bias that I looked at. Usually there is just a large resistor from cold end of IT to negative bias supply; same as I had originally?
I guess, this works well as long as power tube does not draw any grid current; as soon as this happens there is a voltage drop over resistor between negative supply and IT, preventing grid current to flow.

As well, what would be correct way to size this capacitor; I guess the load this cap “sees” is resistance between IT secondary to ground, so around 110K in my case.
So, 0.47uF would give -3db at below around 3Hz; would this be the correct way to size this cap?
Attached Images
File Type: jpg 100V sec.JPG (317.9 KB, 190 views)
File Type: jpg 118V sec.JPG (308.8 KB, 181 views)
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Old 14th December 2012, 01:34 AM   #34
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I think I would want to know how much the 211's bias changes with grid current and what is the time constant of recovery to idle bias level. I'd wonder if the bias supply were stiff enough. But I'm a worrier.

All good fortune,
Chris
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Old 14th December 2012, 06:03 AM   #35
kevinkr is offline kevinkr  United States
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Need to change out that grid resistor and bias pot, and use a much bigger cap as a consequence.. You want a the lowest possible DCR on the cold end of the IT since you are running into A2. I would switch to a 2K/2W pot running >10mA.. Cold end 4.3K, not sure what your bias supply is but hot end should be around -63V... Use large film cap from wiper to ground, no series resistor.

Possibly better use a small P type power mosfet as a source follower to buffer the current pot and drive the cold end of the IT with the source. This will allow for significant grid current to flow in the secondary of the IT without shifting the bias..
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Old 16th December 2012, 02:28 PM   #36
rrrs is offline rrrs  United States
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Hi, here is the complete schematics, including PS. You will notice some extra resistors in negative supply; this is leftover from previous configuration when this was also negative rail supply for SRPP driver when amp was configured as 3 stage.
I understand your point of redesigning bias supply so that it can provide more current in order to run 211 into A2.
One point I really wonder; would I actually benefit to redesign the amp be able to run into A2?
Since I got around 100db efficient speakers I don’t really need much power; sound quality and low distortion would be my main priority.
Considering this, would it be a better approach to increase the B+ on 211 a bit so I can operate 211 at same current (around 65mA), with >60V bias (I now get 65mA with -52V bias.
This would allow 120Vpp swing on the IT secondary before grid starts drawing current; with 3.5:2 IT this makes 210Vpp on the D3a plate; just about where D3a starts to clip with -1.6V bias.
With my 20K:8ohm OPT I should be able to get about 4.5W in class A1; this should give me enough headroom in my setup.

I would really like to hear your opinion on whether there is a real benefit in redesigning bias supply so it can handle some A2 operation?
I guess that current configuration with 100K resistor between the wiper and IT would have a benefit of isolating any bias PS noise; of course, as long as there is no grid current present?
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Old 8th January 2013, 03:28 AM   #37
rrrs is offline rrrs  United States
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Hi, I did few more changes/tests and found following:
Increased bias supply current to 15mA, but seen no difference as long as I stayed in class A1.

Tested following driver’s, IT 4:3.5 coupled to 211, all at same 211 operating point (950V on plate, 64mA and -52V bias) and measured THD at 1Khz on OPT secondary at 1W into 5.7ohm load:

D3a (as triode), 170V on plate, 19mA, -1.6V battery bias; 0.4% THD – this sounded nice, but a bit bright, maybe a touch “harsh” compared to others

5687, 175V on plate, 19.5mA, -6.4V battery bias, 0.16%THD – this is very nice, very smooth, but maybe lacks a touch in HF extension

2C51, both sections in parallel, 165V on plate, 7.5mA/per section, 15mA total, -2.2V bias (regular cathode resistor with 200uF bypass), 0.3%THD – this is actually sounds best to me, sort of between 5687 and D3a

C3g (as triode), 210V on plate, 15mA, -3.2V battery bias, 0.7% THD – did not listen to this as was surprised with high measured THD; maybe it would get less if I would let the tube heat up longer (I did this test after about 10 min from turning C3g on?)

One thing that really surprised me was behavior I seen in my Lundahl OPT; with the same 2C51 tube I would get following THD, all at 1W, 5.7ohm load:
40Hz – 0.4%
100Hz – 0.31%
1KHz – 0.31%
2KHz – 0.37%
4KHz – 0.55%
6KHz – 0.77%
8KHz – 0.98%
10KHz – 1.2%
12KHz – 1.33%
14KHz – 1.37%
16KHz – 1.34%
18KHz – 1.17%

Then I did vey same measurement with Chinese made transformers that came with amp originally and got higher distortion (around 0.7% at 1KHz), but it would remain consistent with frequency (getting higher once you go below 200Hz).
Would anyone have idea why is Lundahl distortion is rising at higher frequency while it is much lower below 2KHz; would this be the function on higher primary (20K vs 10K for Chinese OPT)?
Lundahl has higher inter-winding capacitance which makes it roll-off earlier at HF; but would this influence distortion?
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