CCS power amp bias

[razorrick1293]

Hey there,

I was thinking of going for a basic CCS cathode bias on a 12au7 output, 22k-8 ohm output transformer, cathodes tied, but to be honest, I'm not sure where to start, or even if its a good idea. Ideally, I want to get the most power i can out of it at fairly low distortion.

First off, what transistor should i use? or MOSFET? What should it be rated for?
Secondly, I saw somewhere that a CCS won't allow class AB operation, would this set-up in class A give enough clean headroom?

Thanks for any help
Ricky

 

[Matt BH]

Sounds interesting, what speakers are you using? Also you say cathodes tied together. For single ended fine but if its push pull I reckon a seperate CCS per triode is best with a cap between the cathodes.

I have been thinking about a tiny amp for some nice full rangers I have so I hope some of the more knowledgeable folk pick this thread up.

Cheers Matt.

 

[razorrick1293]

The speakers are nothing speacial, fairly old 8 ohm. This is just for my workbench during the late nights but i seem to have a fair amount of distortion in the output, but the preamp is clean, just a standard 12ax7 pair with volume in the middle. a CCS came to mind, but i wouldnt know where to start, and if bias could be adjustable to find a sweet spot, that would be helpful too.

 

[Matt BH]

I have been using the good old 10M45 for CCS in my stuff so far. You can get really fancy with these depletion mode FETs but to be honest they work well enough on their own.

Could you post a circuit diagram of your amp. Don't worry about software, just scribble it down and take a photo.

 

[razorrick1293]

Still tweaking as necessary, but this is it right now, i cant remember the PSU off the top of my head but its as simple as the rest of the design

 

[Vincent77]

That's a guitar amp... I wouldn't bother with a CCS, as it is supposed to distort anyway, but... why not. A LM317 CCS would be easy enough to implement.

 

[Matt BH]

Ok, looks a bit odd. Where did you get the design? Also are you at your bench right now?

 

[razorrick1293]

Yes it did come from a guitar amp, but its not being used as one No im not at my bench now. i was hoping i could do something with a transistor. il go back to it tomorrow. by the way where did you get the 10M45s?

 

[DF96]

A single CCS in the cathode for push-pull necessarily means Class A, but even then it can sometimes create problems because it stabilises the wrong thing: average current instead of quiescent current. For a power stage these are not the same thing.

 

[razorrick1293]

I see, so this isn't a good idea? And what problems can it create?

 

[DF96]

The problem is that all devices have significant second-order distortion. In a p-p stage these cancel in the OPT (current difference), but not in total device current (current sum). Second-order generates not only second harmonic but also DC. The net result, for fixed voltage bias, is an increase in average current - relatively harmless (quiescent current remains unchanged). For fixed average current set by a CCS, you get an effective biassing back to lower quiescent current - this might increase distortion. Normal cathode resistor bias is a compromise between these two extremes of fixed voltage and fixed average current - you get a somewhat larger average current and a somewhat smaller quiescent current. You would need to set the CCS for a higher current than would be optimum for small signals, so that there is 'room' to bias back for big signals. In this respect CCS bias is worse than normal cathode resistor bias.

This issue does not arise for a small signal LTP stage because there is very little second-order so very little DC shift.

 

[razorrick1293]

Thank you for explaining! back to the drawing board then.

 

[DF96]

Well, some people seem to have used it successfully but I think it might be hard to get the bias right because you have to know how much it will shift under signal.

 

[razorrick1293]

to be honest it sounds like too much work for such a small project. i think il play with resistors more, maybe try a single ended design.

 

[FYC]

The problem is that all devices have significant second-order distortion. In a p-p stage these cancel in the OPT (current difference), but not in total device current (current sum). Second-order generates not only second harmonic but also DC. The net result, for fixed voltage bias, is an increase in average current - relatively harmless (quiescent current remains unchanged). For fixed average current set by a CCS, you get an effective biassing back to lower quiescent current - this might increase distortion. Normal cathode resistor bias is a compromise between these two extremes of fixed voltage and fixed average current - you get a somewhat larger average current and a somewhat smaller quiescent current. You would need to set the CCS for a higher current than would be optimum for small signals, so that there is 'room' to bias back for big signals. In this respect CCS bias is worse than normal cathode resistor bias.

This issue does not arise for a small signal LTP stage because there is very little second-order so very little DC shift.

Hi, I have to admit I might not have fully understood this issue. When you say average current, do you mean the sum of the 2 sets of currents flowing thru the 2 cathodes towards ground?

 

[DF96]

Yes. Under zero-signal conditions the quiescent current (set by the bias) is obviously equal to the average current. When a signal is applied second-order distortion causes the average current and quiescent current to part company. In pure Class A the difference could be 10%; for AB it could be 20-30%. Whether average goes up, or quiescent goes down, depends on the bias arrangements.

The DC comes from trigonometry. Multiply two identical sine waves together (which is what second-order distortion does) and you get two outputs: a sine at twice the frequency, and a DC level. These two outputs are at the same amplitude - DC = peak sine. You won't see the second harmonic coming out of the OPT because of cancellation, so people often forget how much is actually generated in each output device, but the DC affects the bias.

 

[FYC]

Thanks for the note. I need time to digest this.

 

[FYC]

Yes. Under zero-signal conditions the quiescent current (set by the bias) is obviously equal to the average current. When a signal is applied second-order distortion causes the average current and quiescent current to part company. In pure Class A the difference could be 10%; for AB it could be 20-30%. Whether average goes up, or quiescent goes down, depends on the bias arrangements.

The DC comes from trigonometry. Multiply two identical sine waves together (which is what second-order distortion does) and you get two outputs: a sine at twice the frequency, and a DC level. These two outputs are at the same amplitude - DC = peak sine. You won't see the second harmonic coming out of the OPT because of cancellation, so people often forget how much is actually generated in each output device, but the DC affects the bias.

If I understand you right, when a pp pair get a signal, the current changes around a point Different from the Q point, due to the DC level generated together with the 2nd harmonics. The current will actually changes round a point which you call Average current point, and will be higher than the Q point.

OK, let's see a special case.

Assume we bias the output tubes with a CCS at their cathodes. Also, the grid voltage is setup in a fixed bias mode using a resistor network. The CCS will force the combined current thru the tubes to remain constant, so the tubes has to still change their current around the Q point somehow. Then the grid voltages care less what's going on in the tubes but are determined by the fixed bias setup modulated by the input signals. Hence in order to fulfill the extra DC level due to 2nd harmonics, the only thing I can think of is that the tube will flow a different plate voltage change pattern, or in other words the load line is affected and distorted. Will it sound worse?

 

[DF96]

You can't combine CCS bias and fixed voltage bias. All you get is CCS bias, with the grid and cathode voltages displaced by whatever voltage bias you apply. CCS forces the valves to adopt a new quiescent point, so the average current remains fixed.

 

[FYC]

You can't combine CCS bias and fixed voltage bias. All you get is CCS bias, with the grid and cathode voltages displaced by whatever voltage bias you apply. CCS forces the valves to adopt a new quiescent point, so the average current remains fixed.

You are right. What I intent to mean is that to avoid extra high voltage across the CCS, we are use a resistor network similar to a "fixed bias" setup to lower the voltage of the grid. I attach a schematics to illustrate. The KT90s are biased at 70mA with the grid voltage set by the resistors. I select 10V as target. This can reduce the voltage across the CCS.