• WARNING: Tube/Valve amplifiers use potentially LETHAL HIGH VOLTAGES.
    Building, troubleshooting and testing of these amplifiers should only be
    performed by someone who is thoroughly familiar with
    the safety precautions around high voltages.

To vary a signal pentode to triode in stages

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I have never built a UL amp, but it seems to me that once you decide to use the tap of the transformer you are limited to load lines that pivot on the B+'s current vertical line. If appears to me that if the mosfet buffer is used the Screen and B+ can be decoupled and any loadline (with desired B+) can be used. So in the sample curves below, a Class A load line centered around 400V could be used but still having the lowest screen voltage in the swing of 270V vs 240V for a 40% UL transformer using 400V B+. The Screen supply voltage could even be raised to 290 so that at 400V plate voltage the screen is at its maximum idle specification of 450V. 290 + (400x.4)= 290 + 160 = 450V.

Is my thinking sound?

Also, one thing that I can't explain is the strange negative incursion of the plate voltage. Anyone has an idea of what this could be? Inductance of the plate drive transformer? The mosfet pulling it down?

Alfredo
 

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I would check the screen dissipation before going with a raised screen voltage. But if that's still in spec, then I guess it would be a matter of whether the distortion improves there or not. Normally it would be worse with increased screen current, but the Mosfet is fixing that here.

You definitely have a lot more flexibility using the Mosfet divider over the OT tap. Go for the best results, whatever.

Another idea would be to put some additional error gain in the screen feedback path so as to reduce the distortion further. This would have to subtract out some input signal then amplify so as to get more correction component. Just for kicks, one could use an Op Amp and HV amplifier boost stage setup initially to see what that does to the screen voltage waveform when the output is linearized. (if it all can be stabilized)

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Is the voltage pickoff for the Tracer an R divider off the plate itself, or is it using an LV tap off the xfmr? Surprising that the tube or Mosfet could still be forward conducting with a negative voltage applied. Could put a HV rectifier in series with the drain just to eliminate the possibility as a test.

Another thing could be an A/D conversion delay between I and V (if that is being used), but this looks like it would have to be more than a few samples delay time.

Or how about the step wave being a bit out of sync with the power waveform. Those negative tails almost look like they could be a continuation of another step curve. They seem to shift by one step.
 
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Another thought on the negative plate V curves phenomena. The common mode capacitance of the floating screen supply may be causing some unexpected Mosfet drain current. Although I can't figure any way to get negative plate V from that. If you have a pwr line isolation xfmr, try that to power the floating screen supply to see if it makes any difference.

Other than that, possibly some distributed capacitance in the tracer setup. Tektronix has what they called looping compensation on their tracer, which is a variable plate capacitor to null out some capacitance. But I think the effect there is one of slight loops for the plate curves.
 
I ran the 6l6GC again with both connections to the drain. The curves overlay each other at Plate voltages > 0. The only differences are the negative excursions. I also tried supplying the drain with its own supply with the negative tied to the sense resistor to add the screen current to the curves. Results are the same as with the drain connected directly to the rectifiers (no negative excursions).
 
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