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45 DHT HT Supply oscillating - help!

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Hi everyone,
In seek for some help as I finally completed my 45 DHT amplifier. I have an issue with my HT supply which is oscillating at full load. When I tested the amplifier with my bench supply (albeit it can only deliver 330V and not the 350V needed by my amplifier) did not oscillate at all.
When I use the driver circuit which don't drag more than 8-10mA in total, it doesn't oscillate either. When I plug in the output valves (45 DHTs running at 33mA each) I can see a nasty HF noise in both the HT line and the output. Also apparently the HT line cannot regulate properly (at least this is what I see with my multimeter so not sure if this is the HF noise effect).

Attached is my feedback regulator used in my supply. Also have made a different plot changing C4 from 470n to 220p which is the value that seems to eliminate the peak at high frequency. Is the value of C4 the cause of the HF noise?

Thanks for the help, I'm kind of lost here as am not an expert on feedback regulators :)
Cheers,
Ale
 

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Hi Ale,

There are a number of oscillation sources in that circuit, sad to say.

First, C4 will supply an error signal that will extend to very high frequency, into the MPSA42-stage, but this stage will have very limited bandwidth because of the high 47K load resistor, and the nF-level of capacitance at the pass-FET's gate. So, you have an oscillatory tail-chase of the NPN output always being far behind the fast response of the error term.

Although you could possibly construct a push-pull buffer to isolate this capacitance from the MPSA42, some frequency compensation will still ultimately be necessary. This can be designed with the help of LTspice, by finding the open-loop poles in the regulator and applying compensatory zeros, or by applying deliberately dominant poles to the circuit to prevent the regulator from attempting to regulate at high frequency - in which case use HF decoupling on the B+ with some Audio MKPs of 10uF or so from Farnell (the LCR-AmpOhm MKPs):

AMPOHM WOUND PRODUCTS|FP-CA-10-AU|CAPACITOR, AUDIO, 10UF, 630VDC | Farnell United Kingdom

If you wanted to learn more about pole-zero compensation, the Horowitz & Hill chapter on the subject is very clear.

The other possible source of problems is the capacitive load on the MPSA42 emitter - this could make the Real part of the impedance at the base go negative at some frequencies (and operating current), which is a sure recipe for oscillation. using 100-ohm right at the base lead should fix that, or a wideband grade of ferrite bead.

Overall, I would be surprised if the circuit can be wrestled into giving good audio performance - getting the transient dynamics of this kind of circuit to behave properly is a long and arduous task, and many revisions will need to be tried before it does justice to something so wonderful as a 45SE. Remember that the reg is effectively in series with your power amp stage, and will have a strong influence on the sound.

You could try one of the little HV regulator PCBs that tomchr sells - this has been properly compensated. But first, I would highly recommend trying it unregulated with a LCLC supply, to get a feel for what the 45 can do!
 
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Thanks Rod.
Problem is that I do have a high raw supply voltage (about 475V after sagging at full load) and limited space on my HT chassis. I do have a CLC stage prior to this, see attached diagram.

Will have a read on feedback when I get the time! Thanks

What about a simple zener regulator with a mosfet pass-through as in the attached? This looks ok from an AC perspective...


Finally, what about then replacing the whole lot for a 2k2 15W clamp resistor instead?

Thanks again for the help

Ale
 

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Looking at it again, the low output capacitance values will probably worsen the effect, if 500n really is the Cout cap.

Adding 10uF in a quality MKP would reduce the bandwidth that the regulator could drive the B+ at, maybe low enough to suppress the oscillation.

But the problem remains that the circuit does not show any compensation components - this will restrict the stability performance greatly.

If you prefer the 'cut & try' approach, add a series-RC network across R1 in your LTspice circuit, and adjust C until the response begins to roll of at around 200-300Hz. R = 3.3 .. 10K at a first estimate. The B+ 10uF will be needed, and 1 to 5K in series with C4.
 
Thanks Rod.
Problem is that I do have a high raw supply voltage (about 475V after sagging at full load) and limited space on my HT chassis. I do have a CLC stage prior to this, see attached diagram.

O - if you have CLC and you want less voltage, just omit the first C. [C1 - C2]. The voltage will drop to about 0,9x the rms secondary voltage, and the regulation will improve.

What about a simple zener regulator with a mosfet pass-through as in the attached? This looks ok from an AC perspective...

This will work and sound much better I suspect. The zeners needs to be RC filtered for preference, but that can be worked out later...

Finally, what about then replacing the whole lot for a 2k2 15W clamp resistor instead?

Do you mean a shunt resistor?
 
If the idea of converting from CLC to LC PSU appeals, please remember that you can add a little cap at the C1 position (0,47u to 1,5u) and get the 350V you need, almost exactly.

The choke will need more current-handling than in the CLC case, but if you model it up in Duncan PSUD2 you'll see exactly what the ratings will need to be.
 
O - if you have CLC and you want less voltage, just omit the first C. [C1 - C2]. The voltage will drop to about 0,9x the rms secondary voltage, and the regulation will improve.
Ok, will try removing C1-C2 and take the voltage down to 350V.
This will work and sound much better I suspect. The zeners needs to be RC filtered for preference, but that can be worked out later...

Re your point around the zener RC filtering, is not sufficient what I added in my circuit?
Do you mean a shunt resistor?


I meant removing the regulator and adding a simple RC stage.
thanks
 
Looking at it again, the low output capacitance values will probably worsen the effect, if 500n really is the Cout cap.

Adding 10uF in a quality MKP would reduce the bandwidth that the regulator could drive the B+ at, maybe low enough to suppress the oscillation.

But the problem remains that the circuit does not show any compensation components - this will restrict the stability performance greatly.

If you prefer the 'cut & try' approach, add a series-RC network across R1 in your LTspice circuit, and adjust C until the response begins to roll of at around 200-300Hz. R = 3.3 .. 10K at a first estimate. The B+ 10uF will be needed, and 1 to 5K in series with C4.

I did have a 47u 450V cap on the 300V rail and removed it because I suspected that this could be the cause of the oscillation. Also tried the whole setup with a 4K7 resistor load only and did not oscillate....
 
If the idea of converting from CLC to LC PSU appeals, please remember that you can add a little cap at the C1 position (0,47u to 1,5u) and get the 350V you need, almost exactly.

The choke will need more current-handling than in the CLC case, but if you model it up in Duncan PSUD2 you'll see exactly what the ratings will need to be.

Can you simulate a hybrid rectifier with PSUD2?
My choke is a 10H 100mA one.....
 
Rod,
Ok. I put back my RIFA 47uF capacitor but now on the 350V rail, not the 300V which impacted the HF response. The 500nF are Russian PIO capacitors.
See simulation attached
Worth trying this or do you suggest changing the CLC to LC or adding the mosfet Cap multiplier stabilizer?

Thanks
Ale
 

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Rod,
Ok. I put back my RIFA 47uF capacitor but now on the 350V rail, not the 300V which impacted the HF response. The 500nF are Russian PIO capacitors.
See simulation attached
Worth trying this or do you suggest changing the CLC to LC or adding the mosfet Cap multiplier stabilizer?

Thanks
Ale

I think the LC simple solution will be easily the best sounding.

If the hum is too great, and you don't want to go to LCLC, you can add the "WE91" capacitor network ~(if you use cathode bias): eg.: Cap from cathode to B+ = 10uF, cap from cathode to GND = (~mu +1) x bigger, eg 33..68uF.

Might still need an electrolytic (eg 150uF 400V Nichicon KX) for LC-only; but I would bet it would still sound better than an unoptimised regulator, and most likely better than an optimised one.

LCLC would of course be better again, but if the space ain't there....
 
I think the LC simple solution will be easily the best sounding.

If the hum is too great, and you don't want to go to LCLC, you can add the "WE91" capacitor network ~(if you use cathode bias): eg.: Cap from cathode to B+ = 10uF, cap from cathode to GND = (~mu +1) x bigger, eg 33..68uF.
I use fixed bias. I did simulate it somehow with PSUD2 and got about 1V ripple on the output. Don't have more space in the chassis for an LCLC network.
May try the zener option then and report!

Might still need an electrolytic (eg 150uF 400V Nichicon KX) for LC-only; but I would bet it would still sound better than an unoptimised regulator, and most likely better than an optimised one.

LCLC would of course be better again, but if the space ain't there....
 
BTW. All this happened when I start tweaking the HT supply. Previously didn't have the RIFA 47u in the 300V rail, albeit I did burnt out the 1K resistor due to a faulty multipole connector which caused the loss of bias on the 45s. I then replaced the 1K resistor, added a 4k7 resistor in parallel with the 100mA cathode fuse on the 45s, replaced the connector with a better one and also added the 47uF RIFA electrolytic to the 300V. This created the HF oscillation. I thought this was going to add better response to the 45 anode current dynamics but was wrong

Have to say that when the amp was working, it sounded fantastic. No hum whatsoever in my grado headphones and your DHT heater regulator boards performed absolutely perfect. Highly recommended if anyones is looking at a DHT filament supply option and for the kit value, is a no brainer to get one of this!
 

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Hi Ale,

There are a number of oscillation sources in that circuit, sad to say.


If you wanted to learn more about pole-zero compensation, the Horowitz & Hill chapter on the subject is very clear.

Rod is correct. Now the hard ones and Glad to see some RF gain element mentioned.
The Learning curve is that the Mosfet and transistor have fantastic FT's into the MHz regions that have to be tamed right down to avoid them oscillating with the forward shifting poles these types of close loop feedback circuits produce. It's right into Bode plot physics ballpark.....not conversant ? read up ! Unfortunately Morgan Jones valve amps 3rd edition deliberately wiggles out of the physics..but a good switchmode power handbook (Unitrode power supply and design) will have an excellent description and theory that one requires in closed loop design.
The approach in my circuit out of the junk box is pretty similiar. Note ferrites in each mos gate and drain and snubber circuit. The current limiting is only for start up...(reality no HV current limiting supply is fully bomb proof on a 500V to zero s/c test, so don't try it).
Remember whatever spice simulation circuit one uses, it WON'T be perfect...so much depends on layout and parasitics. The bugbear in all HV stuff is reduce the excess gains one doesnt' need, hence a higher reference voltage is a good start. Hivolt Zeners are impedance rubbish....again I use 431's in series (superb example of current sourcing) with a much lower forward Z but make sure no transient spike reaches them otherwise one or all the series chain is easily destroyed. Notice the feedback pole capacitance has a resistor in series...spike/transient damping directly in the TL431 feedpath either from pole feedback from the output or input..The working result is close sand regulation and hum performance. The "Zero" from the output cap is required, all these circuits have an undesirable gain/response pole that has to be neutralised and is often better to design a stable circuit with a bit of transient slowness and use a slightly higher output capacitor value. Study the circuit, and one can simulate it. It's stable on a good pcb layout.
Typical tests that one should do: AC ripple performance close to regulator drop out voltage with maximum current, (illustrates end of loop gain) also with overvoltage conditions with min loop gain.

Remember You are taking on quite a task:
HV stabilised power supplies are notorious for mysterious and unaccounted blow-up's....til one learns about them and there aren't many around that specify complete s/c protection. Prototype them on the soft side, add carbon /HV resistors where necessary and cut them down later on optimisation.
I am not sure if Bode gain/phase plots is part of the standard technical curriculum..so much time has passed since I did it on a slide rule, (1967)

richy
 

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