How a SRPP stage sounds like?

[Merlinb]

Originally Posted by StevenOH

Yes, you are correct. SRPP action has nothing to do with the presence/absence of the "cap". You just need to design SRPP.

That is not quite true. The load is fundamental to the operation of the SRPP. If, for example, you directly coupled the 'SRPP' to the grid of another valve then it is no longer an SRPP because there cannot be any push-pull action.
e.g:This is an SRPP:


This is NOT an SRPP:


This is NOT an SRPP either:

[Globulator]

But MerlinB, won't the presence of miller capacitance cause current to be pumped in and out of that gate - at high frequencies at least?

I can't see any difference for the driver stage between driving miller capacitance or a coupling capacitor - does this make sense?

[Merlinb]

Originally Posted by Globulator

But MerlinB, won't the presence of miller capacitance cause current to be pumped in and out of that gate - at high frequencies at least?

Yes, it does deliver push pull into the Miller capacitance. Now we are getting pedantic!

[oshifis]

SRPP is acting push-pull in the sense the lower and the upper gain elements change their internal impedance in the opposite direction. It can be considered as a variable attenuator. In AC operation, the source impedances of the upper and lower gain element are connected parallel. This resulting source impedance has a maximum at no signal, and is symmetrically decreasing with signal in either direction. (For example in steady state 10k + 10k results 5k, in the +ve half peak 5k +15k results in 3.75k, same for the -ve peak; now you see what I mean). The load is just in series with this source impedance.

Therefore the SRPP has symmetrical output current (via a capacitor into a load), but it has also symmetrical output voltage even without any load. This is because the above mentioned attenuator (comprising of dynamically controlled gain elements) changes its upper and lower impedance symmetrically.

[StevenOH]

It's always a puzzle to me, how things work (with human perception).
After reading Merlin'sarticle (some time ago), I said to myself "At least
he understand SRPP basics".
And now I am reading your posts here...

Let's put things in perspective.
There are three variations of a "serial amplifier of SRPP topology":
SRPP,
Mu-Follower, and
amplifier with "Dynamic Load".
Dynamic load means non-linear resistance, not a CCS. And that is, typically, triode.
All three do look similar and can exibit a smooth transition from one mode
of operation to another, depending on the nature/combination of the galvanic
Link between the active devices, load, active devices themselves, bias.

The second pic in post 31 clearly is not a SRPP (variety - no SR !) at all !
It can be described as DL, though.
Pic 1 is SRPP, but it can be described also as DL, depending on the conditions
I have listed, namely:
if the amplitude of AC current into the load will be miniscular in comparison with the bias current.
But it has nothing to do with the depicted cap, unless it is so small, that it
will increase the impedance of the stage load (1M plus iwC).
Pic 3 is the opposite of pic 1, because it is DL, transitioning into SRPP with
the frequency rise.
So, posters Michael, Globulator, oshifis are correct in this regard, (count me in), because we cannot limit ourselves only to DC domain, when analyzing the circuits, that analysis also need to include the HF behavior (and transient
response, if you want...). And that HF behavior will be affected by any capacitance (Input/Miller, MOSFET gate, RIAA network, cable...), or inductance, if any present.
So, in the quote: <<Yes, it does deliver push pull into the Miller capacitance. Now we are
getting pedantic>> second sentense has nothing to do with the reality.
So, should we say more?

A few words for those, who can hear (unrelated to the stambling blocks in this thread discussion).
In the SRPP (mode, sufficient current into the load), as depicted in pic 1, as
an example:
BOTH active elements are connected in parallel on AC as COMMON SOURCE triodes,
There is local feedback (Rk) on the bottom one, but there is very little FB through Rak for the top one.
The amount of local FB for the top triode will depend on the output impedance of the bottom triode - if the bottom active element will be pentode, local FB through Rak for the top triode will disappear.
Top's Rak will act as a FB only in DL mode (load current is unsignificant vs. bias).

P.S. Oh, what the hell... Here the web links to the articles I've mentioned before:
http://valvewizard2.webs.com/SRPP_Blencowe.pdf
http://digilander.libero.it/paeng/no...f_the_srpp.htm
http://digilander.libero.it/paeng/th..._paragraph.htm

[StevenOH]

Clarification:
In my statement:
"BOTH active elements are connected in parallel on AC as COMMON SOURCE triodes"
I meant COMMON CATHODE - Mosfets were flying through my head at the moment...
And I used "iwC" to refer to "capacitor impedance", not the precise formula to
calculate it.