Yes, Ale, the open-loop gain of the FET stage will have a pole formed by the 174K and all the capacitance at the Drain node (Coss + 4P1L Cin). This will add up to about 1nF, so the pole will be around a handful of kHz.
This reduction in open-loop gain means the feedback has less to work with, and its effect on reducing distortion declines.
If a lower-power FET can substitute the DN2540 (one with lower Coss) some HF gain can be recovered.
This reduction in open-loop gain means the feedback has less to work with, and its effect on reducing distortion declines.
If a lower-power FET can substitute the DN2540 (one with lower Coss) some HF gain can be recovered.
Yes, as open-loop gain decreases (the pole's action), the amount of correction the feedback can apply is weakened.
Lower power FET, or if it can be made to work - a BJT would be much better. 400V NPN BJTs can be had with only 10-20pF of Cob, at 10V or more of Vce.
Bias an NPN with a CCS fed LED, applied in place of the ground for the input's 47K.
You'd have to try a few types to find something with the right level of output slope.
Lower power FET, or if it can be made to work - a BJT would be much better. 400V NPN BJTs can be had with only 10-20pF of Cob, at 10V or more of Vce.
Bias an NPN with a CCS fed LED, applied in place of the ground for the input's 47K.
You'd have to try a few types to find something with the right level of output slope.
So LND150 has 3.5pF Coss max. whilst DN2540 has 30pF. Looking at the Coss curves I can see that the capacitance is growing exponentially at VDS <15V. I'm operating around that area. I need to increase the bias point to ensure VDS is at least 50V and will get lower Coss
Alternatively, what about increasing the drain current to ensure there is sufficient slew rate to handle the Cin+Coss? If the feedback resistor is low enough to not match with the Zout of the FET, I can add a parallel shunt resistor at the grid to help equalising the feedback resistor needs.
What do you think?
thanks
Ale
Alternatively, what about increasing the drain current to ensure there is sufficient slew rate to handle the Cin+Coss? If the feedback resistor is low enough to not match with the Zout of the FET, I can add a parallel shunt resistor at the grid to help equalising the feedback resistor needs.
What do you think?
thanks
Ale
Supertex specify Coss for the condition Vgs = -10V (so zero drain current), and it will be higher when turned ON.
But you could try it and measure the bandwidth - just the FET, open loop. Or just measure the HF distortion again.
Even if the Coss is 50pF, it should be fine.
Increasing the current is OK for the FET, at such low voltages, but the trafo must carry the current, so that might be a penalty.
If the FET's not good enough, an NPN like the KSP44 or any of the new ST or NXP high voltage parts would be worth a look. The slope will probably be different though.
But you could try it and measure the bandwidth - just the FET, open loop. Or just measure the HF distortion again.
Even if the Coss is 50pF, it should be fine.
Increasing the current is OK for the FET, at such low voltages, but the trafo must carry the current, so that might be a penalty.
If the FET's not good enough, an NPN like the KSP44 or any of the new ST or NXP high voltage parts would be worth a look. The slope will probably be different though.
Hi Rod, I'm travelling now, so will have to do these tests when I'm back in two weeks.
I will measure HF response at open loop and distortion of the FET only. I can try and compare LND150 against the DN2540. If LND150 is not good enough, I could try to increase the drain current at least to 5mA and ensure there is sufficient VDS to keep output capacitance low. Higher drain current will improve slew rate and reduce HF distortion hopefully.
Once I do that, I can come back to the circuit and readjust the DC points with the new feedback resistor. A small variance of less than 5mA in current shouldn't be a problem to handle with this OT given the gap it has. But I agree that this is the price you have to pay for increasing drain current.
Ale
I will measure HF response at open loop and distortion of the FET only. I can try and compare LND150 against the DN2540. If LND150 is not good enough, I could try to increase the drain current at least to 5mA and ensure there is sufficient VDS to keep output capacitance low. Higher drain current will improve slew rate and reduce HF distortion hopefully.
Once I do that, I can come back to the circuit and readjust the DC points with the new feedback resistor. A small variance of less than 5mA in current shouldn't be a problem to handle with this OT given the gap it has. But I agree that this is the price you have to pay for increasing drain current.
Ale
The channel separation in this amplifier has to come from both 2K5 output transformers. Biassing is done through two batteries. You can safely connect all points indicated with ground symbols together. I'd use the last cap in the PS (2200uF) for ground reference.
Rod,
Just a second thought about the source of the HF distortion. I'm currently using a 200K carbon potentiometer as the feedback resistor. I suspect this can be blame for the raising distortion with frequency given the significant voltage difference across it.
Do you think this could be a significant contributor of this observed distortion?
cheers,
Ale
Just a second thought about the source of the HF distortion. I'm currently using a 200K carbon potentiometer as the feedback resistor. I suspect this can be blame for the raising distortion with frequency given the significant voltage difference across it.
Do you think this could be a significant contributor of this observed distortion?
cheers,
Ale
hi Ale, The parameters of feedback resistor value, and typical capacitances of FETs + stray + 4P1L Cin - are enough to explain the rise in distortion above 5-10kHz.
OTOH, I would not expect the pot to have such a dramatically measurable effect at only a few kHz.
Then again, you can find a 100K + 75K 3W part, and re-measure, and know for sure.
OTOH, I would not expect the pot to have such a dramatically measurable effect at only a few kHz.
Then again, you can find a 100K + 75K 3W part, and re-measure, and know for sure.
Yes Ale, the bias voltage and current of the FET at #810 is small signal jFET territory. I think you still can easily get a BF862 or J113 from Farnell and Mouser or the low noise ones preferred by Japanese DIYer the 2SK170, 2SK30A, 2SK117 from Little Diode and Langrex. Try to select the type that will require lowest possible source resistor value at selected bias point.
As a bonus, you can have Kamijo-san's Super Triode Connection (STC) simply by replacing R6 with a triode connected as CCS working at the FET bias current.
Hi Indra,
The STC is definitely something I want to experiment with. Thanks for the suggestion.
A small signal FET may struggle with the HV applied at drain at start up I guess?
Coming back to the DN2540, I was doing some calculations at the back of an envelope as I don't have a computer here and in order to get a 5mA drain current I would probably need about 48K of feedback resistor. For a Fb=15% or so, this will imply that the Rout of the FET should be around 5.67 time Rf. This is about 273K which is probably too low for the FET to achieve despite is running at 5mA. The source resistor is 500 ohms if I want to set the bias to 2.5V. Unless I trace the FET I wont be able to estimate accurately gm or rds.
A workaround for this would be to place a shunt resistor (R) across the drain to ground. This will be in parallel with Rout and therefore can help in reducing the resistance required for the level of feedback. In this case I could achieve the 273K as the parallel of Rout and R. Again, I will have to adjust it on test unless I trace the curves.
I haven't traced FET curves with the uTracer, but surely can handle the DN2540 effectively.
Ale
You can use a (say) 60V FET in this circuit, provided a 47V zener is used for protection - it will stay non-conducing in normal operation.
My design choice would be for a fairly low capacitance MOSFET, or a BJT. Low capacitance gives much wider options for selecting the feedback resistors.
When checking a candidate FET for capacitance, please remember that the capacitance can vary wildly around the kind of drain voltages (<20V) in this circuit position, and this dynamic behaviour can lead to unwanted distortion effects. BJTs have lower capacitance, and moderate changes with voltage.
My design choice would be for a fairly low capacitance MOSFET, or a BJT. Low capacitance gives much wider options for selecting the feedback resistors.
When checking a candidate FET for capacitance, please remember that the capacitance can vary wildly around the kind of drain voltages (<20V) in this circuit position, and this dynamic behaviour can lead to unwanted distortion effects. BJTs have lower capacitance, and moderate changes with voltage.
Not on well behaved PSU as seen on SSHV1. A zener diode can be added as shunt protection as Rod mentioned.
Operated common source, I would operate a DN2540 at least ~40mA and >40V to avoid the non linear knee portion of the transfer characteristic, the use of high value source resistor and nonlinear Vds dependent Coss, Ciss and Crss at low Vds that will show up on HF distortion figure.
I could not imagine that you would prefer the sound of DN2540 or even LND150 over 2SK170 in this position at the chosen OP.