Slew Rate Limiting... continued.

[Joel]

I took the liberty of starting a new thread on this interesting subject. I apologize to Dmitry for cluttering his other thread.

Anyway, this was the last relevant post:

Originally posted by Joel
Thanks George. The question at hand though seems to be why my numbers are half those that James got (and presumably Brett since he agreed wholeheartedly).

They calculated a distortion point of 10kHz with a .9mA driver current.
I get a 20kHz point with only .8mA available. And that was a worst-case-scenario of an input capacitance of 80pF.
Can you shed any light on that?

the 71A has Cgk of 3.7pF, Cgp of 7.4pF, mu of 3... 80V swing on the grid.

Thoughts?

[Joel]

Ok, let's use the 2A3 from the other thread.

Cinput=Cgp*(VG+1)+Cgk+Cpk*(VG+1)
So, the input capacitance of a 2A3 is 121.9pF

2piFVp/1,000,000=V/mS
F=20kHz, Vpk-pk=90V
Required slew rate=11.31V/mS

I=C*Sr
.0001219*11.31=1.38mA

So to wrap up, only 1.38mA is required to "drive" the input capacitance of a 2A3. Not very much! And this is at the limit of digital frequency response, and with a FULL amplitude signal input of 90 volts peak-to-peak.

And to finish my example from before, with the 71A, the calculated input capacitance is actually just half what I guessed at. It's really 41.7pF
So.... to drive a 71-A you need only 0.42mA of current.

Joel

[James D.]

Hi Joel,

Sorry not to reply. Got a big problem at work to solve before I can write one out.

Briefly the input capacitance calculation is incorrect.

Cin=Cg-k+Cg-p(1+mu)

gets you the real world figure...

more later

ciao

James

[EC8010]

At the risk of muddying the waters, slew rate specifications are great for op-amps, but not quite so useful for valves. Try this approach, and I think you will see what I mean...

Find the input capacitance of the load. Determine its reactance at the highest frequency of interest. Use Ohm's law to calculate the peak current at that frequency. Now, go back to the original loadline of the driver stage, and plot that peak current directly above and below the operating point (the phase lag of the capacitance causes it to draw maximum current at zero voltage swing). Plot the maximum voltage swing (positive and negative) on the loadline. Finally, draw an ellipse through all four points. This is your AC loadline.

When I have done this, I invariably feel that I would like a lot more current through my driver to keep the distortion down (even if it is ultrasonic).

[James D.]

First a confession - some of my quoted numbers were wrong due to my sloppy use of Jim de Korts spreadsheet - Sorry .

To check I'm doing it right I have derived the equation for input current required for zero slew rate limiting into a valve and my work is included below for all to mock

I will rework my figures and ajust my conclusions as required. My apologises for the confusion that my erroneous figures caused.

ciao

James

[James D.]

Network truncated the picture first time...

[Sch3mat1c]

Geez. That's three different equations for Miller cap I've seen *today*!

Tim

[EC8010]

James, your derivation from first principles up to Eq. 9 is spot on, and (even more pleasingly) agrees with Ohm's law and the capacitor's reactance at a given frequency.

However, Eq. 10 is rather awkward. Using gmRl is handy for pentodes, but somewhat clumsy for triodes (which, after all, are the ones that have the serious Miller problem). I feel that the following is handier:

Cin = Cgk+Cag(1+A): where A is the voltage amplification to the anode

[James D.]

Tim,

I given two differnt ones for Miller cap today myself. The first where no reference to a specific circuit applies uses mu as the amplification. The second uses the formal derived expression where gm*R' represents the amplification. The third uses A for the amplification...

Three expressions - one meaning...but then you knew that....

All sing chorus "The games people play..."

ciao

James

[Joel]

Uh... ok, james, isn't that what I just said?

Anyway, no, my input calculation is actually correct. In your's you neglect the stray capacitance and Miller effect between cathode and plate. They exist in the 'real world'.
Please see the R.D.H. - which is where it is taken directly from.

Regardless, when looking at the actual numbers, I think it's pretty clear that the mantra 'you can't overdesign the driver' is silly.

Brett, you were right. It is very basic engineering.