11.60 32.7
11.60 32.8
11.60 32.9
................
// 11.62 33.0 //
................
11.64 32.9
11.68 32.7
11.68 33.0
11.70 32.9
For highlighted above we figuring out VP= - 0.7v. So, we have the equation of jfet and two points of the graph.
My doubt : the others points of "your jfet" : Is the same with graph?!
11.60 32.8
11.60 32.9
................
// 11.62 33.0 //
................
11.64 32.9
11.68 32.7
11.68 33.0
11.70 32.9
For highlighted above we figuring out VP= - 0.7v. So, we have the equation of jfet and two points of the graph.
My doubt : the others points of "your jfet" : Is the same with graph?!
what grade JFET to use in the Aleph J
Probably best to use the BL's as most people who have made the Aleph J and F5 for that matter use them. The higher Idss will theoretically give you higher transconductance therefore higher gain. how true this is in reality all depends on what you use for your constant current source and your biasing resistors amongst other variables.
I would say people have done tests on both the GR and BL grades and it seems the BL has come out on top as that is what's preferred on the BOM. In any case stick to the BOM it is generally a tried and true method.
Probably best to use the BL's as most people who have made the Aleph J and F5 for that matter use them. The higher Idss will theoretically give you higher transconductance therefore higher gain. how true this is in reality all depends on what you use for your constant current source and your biasing resistors amongst other variables.
I would say people have done tests on both the GR and BL grades and it seems the BL has come out on top as that is what's preferred on the BOM. In any case stick to the BOM it is generally a tried and true method.
Jason,
Is Grade B still on schedule to arrive by the end of this month? Need to put in an order at the store for other bits at the same time...
Thanks
Is Grade B still on schedule to arrive by the end of this month? Need to put in an order at the store for other bits at the same time...
Thanks
The data sheet here shows the LSK170 pin out as a top view, was that an error?
I've never seen top view used for such diagrams and it is opposite to the Toshiba part:
Linear:
http://www.linearsystems.com/assets/media/file/datasheets/LSK170.pdf
Toshiba:
http://datasheet.octopart.com/2SK170BL-Toshiba-datasheet-101287.pdf
Toshiba does not state top or bottom but it is a mechanical drawing showing the leads which you would only see from the bottom.
Obviously, the diagrams do not agree.
I've never seen top view used for such diagrams and it is opposite to the Toshiba part:
Linear:
http://www.linearsystems.com/assets/media/file/datasheets/LSK170.pdf
Toshiba:
http://datasheet.octopart.com/2SK170BL-Toshiba-datasheet-101287.pdf
Toshiba does not state top or bottom but it is a mechanical drawing showing the leads which you would only see from the bottom.
Obviously, the diagrams do not agree.
I'm with you - the pinouts are equivalent and interchangeable IF you assume that the "TOP" of the LSK170 is the flat side which does not have leads sticking out of it. When I use my tri-focaled eyes to look VERY carefully at the mechanical drawings on page 2 of the LSK170 Data Sheet, I can make out the pin designations "1", "2", and "3" in tiny print. Correlating these numerals with the pins' electrical functions ("D", "G", and "S") on the page 1 sketch, confirms that the LSK170 and 2SK170 have the same pinouts for their TO-92 packages.
Well, how do you define "error"? I'd say that using this view to convey pinout information is unwise and easily misinterpreted. I'll also say that the page 1 sketch is incorrect as a mechanical drawing: not only is it unclear which surface is the "top", but since the pins themselves are NOT visible from the assumed "top" view, their outlines should be rendered as a hidden (dotted or dashed) line.
This appears to be the same snake that bit me last December. In that instance I created an incorrect PWB layout for an LP2950 regulator when I failed to notice that a Data Sheet pinout sketch was a "Top View".
The Toshiba drawing complies with the three-orthogonal-view convention that I learned in High School nearly half a century ago, even though the third view is not shown. (In the absence of the third view you assume that the two views shown contain all the information necessary to construct the third view.)
As I mentioned, the sketch on page 1 of the Linear Systems Data Sheet does NOT comply with that convention. The page 2 drawing is more correct, but lacks the mapping information from pin designations to pin functions.
In the "good old days" (formerly known as "these trying times"), universities required students in all engineering disciplines to have at least an introductory course in mechanical drawing. That is no longer standard practice, so I'm not surprised to encounter Data Sheets with incomplete or ambiguous information.
Dale
I actually consider myself to be a visual thinker, much better with diagrams, but my slight dyslexia must be throwing me off here. Seems if I pay close attention to the numbering then I can see your point and it looks correct, but I wish they would not use top view. It also helps if I look at the diagram on page 2 of the document.
I will just continue to use the Toshiba pin out diagram since it is what I'm used to.
Thanks everyone!
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I had not even noticed the drawing on page 2 and that helps. I agree that they are the same but I had to look at it 3 or 4 times and also the page 2 drawing. I also agree that page one is incorrect as a mechanical drawing, quite annoying.
Thanks again everyone!
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Last news LSK Jfet's B grade matched in pre-order now
ready for shipping 8 june
What is co$t ?
Kind regards
The F6 and JFETs were listed for pre-order yesterday accidentally with "placeholder" pricing and without sales restrictions. We will honor all the sales made to the lucky people that placed an order before we noticed the mistake.
F6 and JFETs will become available for pre-order in a few days time when we know the final pricing.