My new mini Class A amp.

[sherelec]

Glen,

I hope this is not too picky.

But, it seems to me that your input network (R2, C3//R3) will start to roll-off at ~13KHz. If you are my age; it probably doesn't matter!

Interesting circuit; thanks for sharing it and your developmental perturbations. I am sorry that you felt it necessary not to keep posted the intermediate circuits.

Best Wishes,
VSR

[GK]

Originally posted by sherelec
Glen,

I hope this is not too picky.

But, it seems to me that your input network (R2, C3//R3) will start to roll-off at ~13KHz. If you are my age; it probably doesn't matter!

Interesting circuit; thanks for sharing it and your developmental perturbations. I am sorry that you felt it necessary not to keep posted the intermediate circuits.

Best Wishes,
VSR

G'day sherelec.

Thanks for the compliments. C3 'sees' R2 in parallel with the series combination of R1, C1+C2 and the output impedance of the audio source. Unless driven from a source with an unusually high output impedance, the frequency roll off will be well above 200kHz. This is done to suppress RFI.

Cheers,
Glen

[fab]

Originally posted by G.Kleinschmidt



Yes, you can run a higher VAS current if you want. What I'm saying is that, in simulation, the linearity degrades a lot if the VAS current is too much higher than the LTP tail current. I tried buffering the VAS with an emitter follower, but it gave virtually nill improvement.


Hmmm...??.... The final schematic is the same as my first version, with the exception of the modified VA stages, which are now as per my 'Figure B' scheme outlined earlier. VAS current is set to approximately 10mA by the quiescent voltage developed across R22 and R25 by the symmetrical current source formed by Q3, Q4 and R7.

Cheers,
Glen

Ok my last intervention on this thread. See http://www.ne.jp/asahi/evo/amp/J200K1529/report.htm figures 3, 4 and 5 for similar arrangement like yours (current mirror loads insym diff stage with VAS base voltage set by curent source...) since it may gives you more ideas...

Good luck

[GK]

Originally posted by fab


Ok my last intervention on this thread. See http://www.ne.jp/asahi/evo/amp/J200K1529/report.htm figures 3, 4 and 5 for similar arrangement like yours (current mirror loads insym diff stage with VAS base voltage set by curent source...

Good luck

Link doesn't work!

[fab]

Originally posted by G.Kleinschmidt



Link doesn't work!

I don't understand since I click on YOUR reply to my post and it works!

May someone else could confirm?

[Ryssen]

It works..

[GK]

Originally posted by fab



I don't understand since I click on YOUR reply to my post and it works!

May someone else could confirm?

I get this:

The page cannot be displayed
There is a problem with the page you are trying to reach and it cannot be displayed.

--------------------------------------------------------------------------------

Please try the following:

Open the www.ne.jp home page, and then look for links to the information you want.
Click the Refresh button, or try again later.

Click Search to look for information on the Internet.
You can also see a list of related sites.




HTTP 500 - Internal server error
Internet Explorer



It could just be the ISP I'm on at the moment. I'll try from my computer at home tonight.
BTW, I didn't copy the idea from somwehere else, but I'll be surprised if it hasn't been done before, since it is so simple. That's part of the reason why I'm openly posting it here - to find out.

[fab]

Originally posted by G.Kleinschmidt


I get this:

The page cannot be displayed
There is a problem with the page you are trying to reach and it cannot be displayed.
--------------------------------------------------------------------------------
Please try the following:

Open the www.ne.jp home page, and then look for links to the information you want.
Click the Refresh button, or try again later.

Click Search to look for information on the Internet.
You can also see a list of related sites.

HTTP 500 - Internal server error
Internet Explorer


It could just be the ISP I'm on at the moment. I'll try from my computer at home tonight.
BTW, I didn't copy the idea from somwehere else, but I'll be surprised if it hasn't been done before, since it is so simple. That's part of the reason why I'm openly posting it here - to find out.

Try http://www.diyaudio.com/forums/showt...87#post1085387 where it shows tha main "parent" link to the one I have posted. See "...2SJ200/2SK1529 link"

[Bonsai]

I got the link. The sublimeness of fully balanced topologies - I love it.

Some good ideas to overcome the points with this type of design raised by Glen at the start of the thread.

I tried this (but without specific circuitry to keep the VAS's in balance) about 2 years ago, and got great simulation results but not in practice. I will have to give it a try again.

One point to note is that the value of the VAS emitter degenration resistors is quite critical and linked to the VAS/LTP current ratios as someone already pointed out. Too high and you get a nasty kink in the bode plot (pole-zero pair? - someone help me out here).

I guess if you can get this fully balanced, current mirror driven VAS right, because of the f/back available, it may make distortion null circuity a bit supurfluous.

One question I have to ask though, is will the forced imbalance in the mirror not lead to increased distortion.

Look forward to your findings Glen.

[GK]

Originally posted by Bonsai


One question I have to ask though, is will the forced imbalance in the mirror not lead to increased distortion.

Look forward to your findings Glen.

G'day Bonsai.

My 'figure B' circuit (post 14) doesn't effect the balance of the current mirror. In my final circuit (post 17) the currents from Q3 & Q4 only flow through R22 and R25. This establishes a quiescent voltage drop across R22 and R25 of 2.4V each, forcing a rather stable 10mA quiescent current in the VA stages. Consider the circuit node at the base of Q23. Q19 mirrors the collector current of Q12. In the quiescent state, Q19 ‘sources’ 2.5mA (half the LTP tail current) to the base of Q23, while Q11 ‘sinks’ 2.5mA from the base of Q23. The VAS biasing current from Q3 has nowhere else to flow, but through the VAS biasing resistor R22. R22 also forms the collector load for the LTP, establishing the stage gain in conjunction with the LTP's emitter degeneration resistors.


Cheers,
Glen