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Old 3rd April 2007, 09:25 AM   #11
GK is offline GK  Australia
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BBBBBZZZZZTTTTTTT #2


Sorry folks - I've deleted the schematic again. It still won't work . Due to the extremely high gain of the current source loaded LTP's, only a very small Ic imballance in one LTP stage can throw one of the VA stages out with respect to the other, to a degree that cannot be corrected by the DC negative feedback. This is a problem with the symetrical VAS topology, as each VA stage forms the current 'reference' for the other. The circuit works fine in spice, where all the components are identical and have 0% tollerance, but building a real working version is another matter......
I can easilly fix this problem by drastically reducing the LTP stage gains with resistive loading, but that completely overrides any benefit of having a pair of current source loaded LTP's.
It looks like I'm going to have to add a pair of DC servo's to steer the VA stages.

Damn it! And it looked like it could be done so simply!

AARRRGGHHHH......
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Old 3rd April 2007, 10:13 AM   #12
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simple design?
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Amplifier Design and Construction for MUSIC! http://hifisonix.com/
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Old 3rd April 2007, 01:47 PM   #13
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Quote:
Originally posted by Bonsai

simple design?


And getting simpler.......


With great relief, I can now happily report that I have successfully come up with and tested a modification to the first version of the circuit that I posted (using current mirror loading of the LTP’s) which is both entirely sound, and slightly simpler than the second version (YAY!!!). Unfortunately it’s past 10pm here at the moment, and I have to go to bed. I’ll redraw and re-post the third-time-lucky schematic tomorrow evening.


Cheers,
Glen
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Old 3rd April 2007, 03:04 PM   #14
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It’s past 11pm now, but bugger it. I work for the government so I can catch up on my sleep tomorrow during the day.

I’m quite happy at having achieved what I set out to do, so I’ll quickly give y’all a quick run-down…….
I’ve scribbled up my new topology Vs the old below. Figure A shows a simplified conventional symmetrical differential input stage and VAS. Each LTP has a tail current of 4.8mA, which divides evenly into each leg, giving a 2.4V drop across each 1k collector load resistor, RA and RB. The VAS transistors drop 0.7V each to give 1V across each 100 ohm VAS emitter degeneration resistor (RC and RD) and a quiescent VAS current of 10mA.
This topology is less than optimal because it doesn’t make use of the collector current swing in one leg of each LTP. Figure B shows the “Kleinschmidt” version. Each LTP is loaded with a current mirror and the quiescent 2.4V drop across the 1k collector load resistors RA and RB is restored by the inclusion of a pair of 2.4mA current sources.
We now have push-pull drive to the VAS, so the gain of each LTP is instantly doubled, and the 10mA quiescent bias setting of the VAS isn’t compromised.

So y’all see? - we don’t have of sacrifice our current mirrors when going symmetrical after all. Now am I a clever boy or what? I don’t know if anyone has come up with this before (I’ve certainly never seen it in all my years of audio fiddling) and I don’t know if it will take-off, but just remember y’all, that y’all seen it here first..........

Cheers,
Glen
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Old 4th April 2007, 01:27 AM   #15
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Quote:
Originally posted by G.Kleinschmidt
...
So y’all see? - we don’t have of sacrifice our current mirrors when going symmetrical after all. Now am I a clever boy or what? I don’t know if anyone has come up with this before (I’ve certainly never seen it in all my years of audio fiddling) and I don’t know if it will take-off, but just remember y’all, that y’all seen it here first..........

Cheers,
Glen
Get back to my post (http://www.diyaudio.com/forums/showt...25#post1173625) where I have shown a symetrical input stage with current mirror loads which I think is more simple than your figure B. In fact I have seen this design (my post) first in 1985 from JLH.


If you could compare your figure B design with the input stage topology I have posted I think it would be beneficial for lots of peoples..
Of course this is more work to do...
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Old 4th April 2007, 10:28 AM   #16
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Quote:
Originally posted by fab


Get back to my post (http://www.diyaudio.com/forums/showt...25#post1173625) where I have shown a symetrical input stage with current mirror loads which I think is more simple than your figure B. In fact I have seen this design (my post) first in 1985 from JLH.


If you could compare your figure B design with the input stage topology I have posted I think it would be beneficial for lots of peoples..
Of course this is more work to do...

I did some simulations of the JLH topology back when I received you first post. It incorporates the VAS stage in a localised negative feedback loop, which heavily cuts back the VAS gain. This improves the VAS linearity, but the circuit only seems to be effective a giving a worthwhile improvement in linearity if the quiescent VAS current is either less or not a lot greater than the LTP tail current. For instance, in your circuit the LTP tail current is approximately 3.5mA while the VAS current is only 2mA.
This, in my opinion, makes the circuit a bit inflexible, because such a low VAS current compromises slew rate and driving ability.

Cheers,
Glen
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Old 4th April 2007, 01:25 PM   #17
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OK guys, here it (finally) is.......
I'm now working on a little +/-20V regulator for the low power rails.


http://users.picknowl.com.au/~glenk/classa.gif
Click the image to open in full size.
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Old 5th April 2007, 01:52 AM   #18
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Quote:
Originally posted by G.Kleinschmidt



I did some simulations of the JLH topology back when I received you first post. It incorporates the VAS stage in a localised negative feedback loop, which heavily cuts back the VAS gain. This improves the VAS linearity, but the circuit only seems to be effective a giving a worthwhile improvement in linearity if the quiescent VAS current is either less or not a lot greater than the LTP tail current. For instance, in your circuit the LTP tail current is approximately 3.5mA while the VAS current is only 2mA.
This, in my opinion, makes the circuit a bit inflexible, because such a low VAS current compromises slew rate and driving ability.

Cheers,
Glen
My post was only an example. I agree that 10ma VAS current is more appropriate for higher slew rate. See revised circuit with 10ma VAS (added buffer stage between input stage and VAS). The VAS gain is increased and high enough (at least for me). LTP current is about 4.5 ma (example again). In fact, you can use different current settings to your liking but select the proper resistor value.
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Old 5th April 2007, 01:56 AM   #19
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Quote:
Originally posted by G.Kleinschmidt
OK guys, here it (finally) is.......
I'm now working on a little +/-20V regulator for the low power rails.


http://users.picknowl.com.au/~glenk/classa.gif
It now looks more and more like my posted circuit (at least for the symetrical cascode VAS...)

How do you set the base voltage of Q23 and Q26 ...?

Borbely site provides some interesting high performance discrete regulator circuit schematics...
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Old 5th April 2007, 02:37 AM   #20
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Quote:
Originally posted by fab


My post was only an example. I agree that 10ma VAS current is more appropriate for higher slew rate. See revised circuit with 10ma VAS (added buffer stage between input stage and VAS). The VAS gain is increased and high enough (at least for me). LTP current is about 4.5 ma (example again). In fact, you can use different current settings to your liking but select the proper resistor value.

Yes, you can run a higher VAS current if you want. What I'm saying is that, in simulation, the linearity degrades a lot if the VAS current is too much higher than the LTP tail current. I tried buffering the VAS with an emitter follower, but it gave virtually nill improvement.


Quote:
Originally posted by fab


It now looks more and more like my posted circuit (at least for the symetrical cascode VAS...)

How do you set the base voltage of Q23 and Q26 ...?

Borbely site provides some interesting high performance discrete regulator circuit schematics...

Hmmm...??.... The final schematic is the same as my first version, with the exception of the modified VA stages, which are now as per my 'Figure B' scheme outlined earlier. VAS current is set to approximately 10mA by the quiescent voltage developed across R22 and R25 by the symmetrical current source formed by Q3, Q4 and R7.

Cheers,
Glen
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