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-   -   Randy Slone "Fig 11.6" amp, modded: will work? (http://www.diyaudio.com/forums/solid-state/92313-randy-slone-fig-11-6-amp-modded-will-work.html)

tcpip 15th December 2006 05:44 PM

Randy Slone "Fig 11.6" amp, modded: will work?
 
2 Attachment(s)
I was thinking of building the "Figure 11.6" amp from Randy Slone's "High Power Audio Amp Construction Manual". It's an L-MOSFET version of his "Figure 11.4" amp, which itself is an improved version of Self's Blameless.

I took the "Figure 11.6" schematic and made some changes. I removed the OPS current limiting circuit, and also removed the drain resistors from the OPS circuit. I've attached the resultant schematic. Will it work?

Removing the OPS resistors of course removes a convenient way to set the quiescent current. I had to remove the resistors purely because I didn't know how to fit the circuit into a 3.2"x4" Eagle PCB otherwise. If I didn't have space constraints, I'd have retained the resistors (and probably also the OPS current limiting).

I'm told that if there's no need to sense output current using the OPS resistors, then L-MOSFET OPS can work without output resistors. I based my circuit modifications on this.

Now that I don't have those resistors, I was thinking of using an experienced friend's lovely suggestion and use the rail fuse holder and an ammeter to set the quiescent current.

What do you think? Will it work?

ilimzn 15th December 2006 06:01 PM

In order to produce a truly stable bias current, you would need to connect the driver emitters and corresponding LMOS drains together, and use small valued emitter resistors (similar to what was previously used for current sensing). With LMOS however this is not as big a concern as it would have been with a different type of MOSFET or a BJT, you might get awat with it.
Secondly, BJT-MOS CFPs are usually asking for trouble :) but again, the low gm of the LMOS may help you there. It won't however help you with output swing, at full output current, you will have a 14V rail loss!

tcpip 15th December 2006 06:14 PM

Quote:

Originally posted by ilimzn
In order to produce a truly stable bias current, you would need to connect the driver emitters and corresponding LMOS drains together, and use small valued emitter resistors (similar to what was previously used for current sensing). With LMOS however this is not as big a concern as it would have been with a different type of MOSFET or a BJT, you might get awat with it.
So basically you are saying that it's not a crazy idea... one can try it. Great. :)

Quote:

Secondly, BJT-MOS CFPs are usually asking for trouble :) but again, the low gm of the LMOS may help you there. It won't however help you with output swing, at full output current, you will have a 14V rail loss!
You're right about the rail loss... 7V per device. I guess this also translates to increased heat dissipation. But then for domestic use, I guess it'll be used at moderate power levels most of the time, so I may never hit rail voltages other than for brief peaks.

I don't understand almost anything about amplifier design, but I did notice that Randy has used a unity-gain 100% local feedback CFP OPS in the BJT version of this amp, and has added local gain in the OPS when he designed the MOSFET version (i.e. the one I've drawn). I believe this gain is being implemented by adding those resistors in the driver transistors' collector and emitter. I wonder why Randy made this change. Is this anything to do with the lower gm of the MOSFET devices as you mentioned?

AndrewT 15th December 2006 06:21 PM

Hi,
the ratio of r17 to r33 seems low.
How about adding 200r in series with r33 and dropping r33 to 1k0?
Use of 2sd669 for Q5 seems a bit odd. Consider a low Cob transistor here.
R22 might be a bit high. Starts to limit at 12mA.
Matching the output FETs will help, but re-inserting source resistors and matching would be better.
Have you considered using different value gate resistors for the P & Nchannel FETs?
I dislike the two CCSs fed from one control. Self never solved the asymetric slew.
Will the front end control the output offset if it runs off a supply that bypasses the fuses? i.e. fuse just the drivers and FETs.
No RF filter at the front end.
C7 seems a bit small.

BUT the big question!!!

Will the CFP work with these relatively fast transistors?

Where do you build in extra resource to debug and stabilise the output?

tcpip 15th December 2006 06:38 PM

Quote:

Originally posted by AndrewT
the ratio of r17 to r33 seems low.
How about adding 200r in series with r33 and dropping r33 to 1k0?
Ouch... you got me there. I'd made a change there without realising its impact. Randy had put something like an 800E for the R17, and had put a 220E in series with the R33, IIRC. I had thought my change wouldn't make a difference.

Quote:

Use of 2sd669 for Q5 seems a bit odd. Consider a low Cob transistor here.
What's a low-Cob transistor?

Quote:

R22 might be a bit high. Starts to limit at 12mA.
I wish I could understand how the values of these resistors in the VAS are set.

Quote:

Matching the output FETs will help, but re-inserting source resistors and matching would be better.
Okay. But will it work reliably without source resistors?

Quote:

Have you considered using different value gate resistors for the P & Nchannel FETs?
I have not considered anything... I don't know enough about amp design to do so. But now that you mention it, I believe others have also said that one of the devices ideally needs larger gate resistors than the other. I forget which. I believe the 2SK1058 needs the higher gate resistor, IIRC.

Quote:

I dislike the two CCSs fed from one control. Self never solved the asymetric slew.
How does asymmetric slew affect the sound? I know it will look asymmetric on the 'scope, but I don't know anything more.

Quote:

Will the front end control the output offset if it runs off a supply that bypasses the fuses? i.e. fuse just the drivers and FETs.
I didn't understand the question? What will I gain if I move the fuses to the "left" and leave the OPS unprotected?

Quote:

No RF filter at the front end.
True. I guess I can think of adding something there if board real estate permits. I hate the Eagle size limit, and paying only takes it to 6"x4". I wish Eagle had the Vutrax limit on pin count, not board size.

Quote:

C7 seems a bit small.
What value do you suggest I should increase it to?

Quote:

BUT the big question!!!

Will the CFP work with these relatively fast transistors?

Where do you build in extra resource to debug and stabilise the output?
I don't think I know enough to even answer this question, but I believe Randy's tried this CFP with these devices, and it works fine, but he used OPS resistors, and I don't know what impact those resistors have on stability.

tcpip 16th December 2006 12:54 AM

Quote:

Originally posted by ilimzn
In order to produce a truly stable bias current, you would need to connect the driver emitters and corresponding LMOS drains together, and use small valued emitter resistors (similar to what was previously used for current sensing).
I believe you are referring to R23 to R26, and you are saying that R24 should not be there.... there should be a direct short between the MOSFET drain and the driver's emitter. But this design does not have that.

From what I've understood (which is extremely little) that sort of direct shorting would mean eliminating the four resistors R23 to R26, and would give you unity gain CFP with 100% local feedback. However, this particular design has less local feedback and some gain, achieved through those resistors. Slone said so in his very brief explanation of this circuit. And I've just retained it as it is.

tcpip 16th December 2006 12:59 AM

Quote:

Originally posted by AndrewT
the ratio of r17 to r33 seems low.
How about adding 200r in series with r33 and dropping r33 to 1k0?
How does one calculate the values of these resistors? Slone does not give any explanations in his book for these values.

In his "Figure 11.4" BJT based design with almost identical topology, Slone uses 820E for the R17, then the trimpot of 1K in series with a 100E resistor.

In his "Figue 11.6" design which is just an adaptation of 11.4 for L-MOSFETs, he uses 1K for R17, and a 220E in series with a 1K trimpot. I had removed the 220E, thinking that any resistance in series with a rheostat can be obtained by just setting the rheostat to an appropriate point.

I'm really curious to know how does one calculate the appropriate values for these resistors/trimpots?

AndrewT 16th December 2006 09:31 AM

Hi,
do you really want us to answer all those questions?

If you need that much information, I suspect that you should be doing much more research on how amplifiers work before modifying another's design.
You need to understand the purpose of each component and it's effect on it's neighbours before you decide, for good reasons, to alter it.

Have you read Leach and ESP and Pass?

tcpip 17th December 2006 01:32 AM

Quote:

Originally posted by AndrewT
do you really want us to answer all those questions?
Yes, I really do.

Quote:

If you need that much information, I suspect that you should be doing much more research on how amplifiers work before modifying another's design.
I modified the design to the extent that my "research" as you call it, allowed me to. In fact, I still consider my modifications to be marginal.

Quote:

You need to understand the purpose of each component and it's effect on it's neighbours before you decide, for good reasons, to alter it.
Or you need to make modifications which your "research" tells you are marginal, and then ask veterans on the Net, and learn from them. This process too is part of my "research".

Quote:

Have you read Leach and ESP and Pass?
I've read ESP (Rod is one of the guys who says that drain resistors from his L-MOSFET OPS can be left out), and Slone's books. I haven't read Self, and I've skimmed through Leach.

Just so that we know what mods we are talking about, I have made only two mods:
  • I've removed the OPS protection components
  • I've removed the OPS drain resistors
I have done no other mods, as far as I can see. And I feel that the two mods I have done can be discussed by even a novice like me without understanding all of Leach, ESP, Pass, Self, or Slone. If you have the patience for engaging in a discussion, that is.

I wish we were spending this energy discussing my questions instead of my reading. :)

AndrewT 17th December 2006 09:02 AM

Hi Tc,
this is a bit long, sorry to others, who may want to skip this (unless I have made a mistake and need correction)
Quote:

the ratio of r17 to r33 seems low.
How about adding 200r in series with r33 and dropping r33 to 1k0?
Use of 2sd669 for Q5 seems a bit odd. Consider a low Cob transistor here.
R22 might be a bit high. Starts to limit at 12mA.
Matching the output FETs will help, but re-inserting source resistors and matching would be better.
Have you considered using different value gate resistors for the P & Nchannel FETs?
I dislike the two CCSs fed from one control. Self never solved the asymetric slew.
Will the front end control the output offset if it runs off a supply that bypasses the fuses? i.e. fuse just the drivers and FETs.
No RF filter at the front end.
C7 seems a bit small.
......Where do you build in extra resource to debug and stabilise the output?

If all you removed/changed were those two items then I think my other comments reflect on the competance of the designer. I don't think much of Sloan , if this is the standard of his work (unless someone else has changed component values). But there again, maybe he has built this design and optimised it to produce the goods, I'm only looking at it theoretically.

Here goes.
Q7 is a Vbe multiplier.
The active part multiplies the current to maintain the voltages set by the upper and lower legs of the resistive ladder.
The lower leg resistors will ALWAYS match the Vbe of Q7, that's where the title comes from.
The 1k:2k defines the minimum voltage produced about [1+(1k/2k)]*0.65~=1V
Setting the pot to 100r sets near maximum voltage, 1+1k/0.1k*0.65=17.5V and the output stage has just overheated and wasted itself.

Q5,
Look up the datasheet for a 2sa649/d669 and compare it to 2sa1360/c3423, Cob 27pF to 2.5pF a factor of 11.

Current limiting of Q6.
r22 set to 47r allows about 0.6v/47r~=12mA of current when it has started to switch on the protection transistor (Q17). Q17 probably starts to switch on at about 500mV and will progressively distort the signal as it's Vbe voltage rises. It will be fully limiting before Vbe reaches 700mV. I think the R47 should be set to at least allow double the VAS CCS current through and preferably three times the current. Some designers go as high as 5 or 6 times as much to ensure the distortion of initial triggering does not become audible on difficult loads. If the VAS needs 47r of degeneration then splitting the resistor in two and monitoring the current in the lower leg of the pair will give a more flexible choice of trigger current.

Source resistors,
the FETs case temperature will depend on device dissipation and heatsink temperature.
Omitting the source resistors will result in poorer matching of bias currents at idle and of output currents when driving the load. The device carrying more bias current will run warmer and when asked to carry output will also take a higher proportion of that as well (if the Gm is similar to it's partners). This will take the device nearer to the SOAR and the hottest device is the one likely to fail first. Fortunately, Laterals are self compensating. I have a 4pair amp that has closely matched Vgs and accurately matched source resistors. I can easily measure the difference in bias currents between them on the good side (Nchannel). I have one Pchannel that has Vgs about 30mV low and it draws nearly 30% more bias current than it's partners. It runs hot. A big THICK heatsink helps here.

Gate capacitance,
the Pchannel has significantly higher gate capacitance than the Nchannel. Putting equal value gate resistors in slows down (low pass filter) the Pchannel more than the Nchannel to changes in drive voltage. Many designers select a lower value gate resistor for the Pchannel to help speed it up a bit. Much debate on the proportional change required. Testing/development!

Slew & shared CCS,
Self spent about half a chapter showing how he failed to solve the asymetric slew that is endemic in his Miller compensated/common CCS circuit. I believe there is an advantage in using the shared CCS (something to do with recovery after clipping?), but Self never told us why he chose to use it, other than saving resources (poor reason). I would add the extra transistor and set my volume control to avoid clipping.

Output slew on fuse blowing.
I asked the wrong person, I don't have a solution.
But my description must have been ambiguous, my proposal was for the fuse in ONLY the driver/output rails. The voltage amp is unfused, not the other way wrong as you interpreted it. But I suspect this alone does not solve the problem.

RF filter,
just two small components. Add them or place them on the back of the input RCAs.

NFB high pass filter,
the RC is set to 220uF*330r=73mS. I think for a wideband amplifier this should be set to about 130 to 150mS, provided the PSU is set to 180 to 200mS. Setting C7 small saves money on smoothing capacitance (and attenuates the bass).

Sloan has shown a confusing variety of ground types. Take care not to common the wrong ones. You need at least two separate types of ground connection from the PCB. or, ALL your other grounds have to come to the PCB central ground (not particularly neat).

Go and read Leach and learn it till it comes out your ears. You may eventually disagree with some of his decisions but that simply means you have learned to recognise the shortcomings he has included in his various iterations.


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