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Old 17th December 2006, 01:07 PM   #11
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Hi Tcpip,
In your original post you said that you left the source resistors etc. out because of space constraints (presumably of the Eagle software). You shouldn't let details like that affect your designs.

If you didn't know, Protel's Autotrax is available as a free download. It's small (dos based), easy to use, allows you to create your own component libraries, and supports very large board sizes (about 36" by 36 " I think).

Here's a link:

http://www.altium.com/Community/Support/Downloads/

There's also a Windows XP video driver available at:

http://www.airborn.com.au/layout/easytrax.html

I hope this helps
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Old 17th December 2006, 03:48 PM   #12
tcpip is offline tcpip  India
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AndrewT, thanks hugely for the patient reply.

Quote:
Originally posted by AndrewT
Q7 is a Vbe multiplier.
The active part multiplies the current to maintain the voltages set by the upper and lower legs of the resistive ladder.
The lower leg resistors will ALWAYS match the Vbe of Q7, that's where the title comes from.
The 1k:2k defines the minimum voltage produced about [1+(1k/2k)]*0.65~=1V
Setting the pot to 100r sets near maximum voltage, 1+1k/0.1k*0.65=17.5V and the output stage has just overheated and wasted itself.
I'm still trying to work my way through this. It'll take a bit of time. I thought I'd respond to the rest first.

Quote:
Q5,
Look up the datasheet for a 2sa649/d669 and compare it to 2sa1360/c3423, Cob 27pF to 2.5pF a factor of 11.
I know now what you meant. Is this important only for Q5? What about the drivers (Q11, Q12)?

Quote:
Current limiting of Q6.
r22 set to 47r allows about 0.6v/47r~=12mA of current when it has started to switch on the protection transistor (Q17). Q17 probably starts to switch on at about 500mV and will progressively distort the signal as it's Vbe voltage rises. It will be fully limiting before Vbe reaches 700mV. I think the R47 should be set to at least allow double the VAS CCS current through and preferably three times the current. Some designers go as high as 5 or 6 times as much to ensure the distortion of initial triggering does not become audible on difficult loads. If the VAS needs 47r of degeneration then splitting the resistor in two and monitoring the current in the lower leg of the pair will give a more flexible choice of trigger current.
I understood what you described about the R22 setting the current limit... Slone's book describes this process while explaining CCS and OPS protection circuits. But I didn't know what a designer shoots for when deciding VAS current limits; Slone's book never mentioned it. Your description filled in that bit. Thanks a lot.

How do you decide what CCS current you need for a VAS when doing a fresh design?

What if I remove the VAS current limiting (Q17 and R20) completely?

Am I right in saying that R14 sets the VAS CCS current in my circuit?

Other than that, I understood your current limiting discussion completely, I think.

Quote:
Source resistors,
the FETs case temperature will depend on device dissipation and heatsink temperature.
Omitting the source resistors will result in poorer matching of bias currents at idle and of output currents when driving the load. The device carrying more bias current will run warmer and when asked to carry output will also take a higher proportion of that as well (if the Gm is similar to it's partners). This will take the device nearer to the SOAR and the hottest device is the one likely to fail first. Fortunately, Laterals are self compensating. I have a 4pair amp that has closely matched Vgs and accurately matched source resistors. I can easily measure the difference in bias currents between them on the good side (Nchannel). I have one Pchannel that has Vgs about 30mV low and it draws nearly 30% more bias current than it's partners. It runs hot. A big THICK heatsink helps here.
Got it. Basically, if I understand it correctly, my omitting the OPS resistors is not a good idea, but the amp may still work.

Quote:
Gate capacitance,
the Pchannel has significantly higher gate capacitance than the Nchannel. Putting equal value gate resistors in slows down (low pass filter) the Pchannel more than the Nchannel to changes in drive voltage. Many designers select a lower value gate resistor for the Pchannel to help speed it up a bit.
Yes, this part I understood completely. In fact, in Slone's second book, "Audiophile Projects Sourcebook", he has power amp schematics where he himself has switched to putting different values for gate resistors for MOSFET designs. I think Rod Elliott's P101 also uses different values (he uses gate resistors only on one half and not on the other, I think).

Quote:
Slew & shared CCS,
Self spent about half a chapter showing how he failed to solve the asymetric slew that is endemic in his Miller compensated/common CCS circuit. I believe there is an advantage in using the shared CCS (something to do with recovery after clipping?), but Self never told us why he chose to use it, other than saving resources (poor reason). I would add the extra transistor and set my volume control to avoid clipping.
Basically, you're saying I should add another Q4 and R7 to the rear of Q8, right? Slone mentions the shared CCS purely as a transistor-saving technique.

Quote:
Output slew on fuse blowing.
I asked the wrong person, I don't have a solution.
But my description must have been ambiguous, my proposal was for the fuse in ONLY the driver/output rails. The voltage amp is unfused, not the other way wrong as you interpreted it. But I suspect this alone does not solve the problem.
Initially I couldn't make head or tail of what you were saying here, but I think it's finally clicked. Basically you're saying that if one rail fuse blows and the other doesn't, then there'll be huge DC on the speaker output, right? I hadn't thought that far. If I don't put the fuse before the OPS, then I thought the purpose of the fuse is not served, is it? I thought the fuses were there to protect the OPS, no?

Quote:
RF filter,
just two small components. Add them or place them on the back of the input RCAs.
I understood this one. This is just a parallel pair of one C and one R, both connecting the signal input to the signal-ground, right?

Quote:
NFB high pass filter,
the RC is set to 220uF*330r=73mS. I think for a wideband amplifier this should be set to about 130 to 150mS, provided the PSU is set to 180 to 200mS. Setting C7 small saves money on smoothing capacitance (and attenuates the bass).
This was one more area where I had no basis earlier for calculating the values of the components. I now know. I can always increase C7 to any value, maybe 1000uF.

Quote:
Sloan has shown a confusing variety of ground types. Take care not to common the wrong ones. You need at least two separate types of ground connection from the PCB. or, ALL your other grounds have to come to the PCB central ground (not particularly neat).
I was trying to design my PCB to have an external HQG and make the following ground links:
  • a signal ground which would connect the NFB ground and input signal ground to the HQG (called INGND)
  • two grounds for the two sets of decoupling caps, close to the V+ and V- input points (called PGND1 and PGND2)
I was thinking of connecting all the other circuit grounds to either PGND1 or PGND2.

Quote:
Go and read Leach and learn it till it comes out your ears.
Does he have books, or are you just referring to his amplifier Web pages? I'll go look them up. I've never read his theoretical discussions carefully the way I've read some of Self and ESP and most of Slone.

Thanks for your huge patience. You've made a permanent difference to my knowledge about amp design.
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Old 17th December 2006, 04:25 PM   #13
AndrewT is offline AndrewT  Scotland
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Hi Tc,
Quote:
Originally posted by tcpip
Is this important only for Q5? What about the drivers (Q11, Q12)?

..........How do you decide what CCS current you need for a VAS when doing a fresh design?

What if I remove the VAS current limiting (Q17 and R20) completely?

Am I right in saying that R14 sets the VAS CCS current in my circuit?

..............the amp may still work.

............I should add another Q4 and R7 to the rear of Q8, right?

.......I thought the fuses were there to protect the OPS, no?

..........I can always increase C7 to any value, maybe 1000uF.

...... his amplifier Web pages? I'll go look them up. I've never read his theoretical discussions carefully.............
It's the tiny available current from the LTP that must be designed for. The drivers have more current drive from the VAS, they also need good power and current ability of their own and cannot be made to survive with a low Cob.

VAS CCS current seems to vary between 3mA and 30mA depending on what follows, what the VAS itself can stand, what current best suits the VAS characteristics and the designer's choices.

Remove current limiting and you risk losing the VAS due to overcurrent, either due to a difficult load or due to output abuse.

R14 and the controlling Q4 set the VAS current.

Yes, it will still work, but how unbalanced are the case temperatures and for how long. Be gentle, it may run forever and sound OK.

Yes, copy the current setting CCS for both transistors. But keep in mind some do not agree with this view.

The fuses will NEVER be fast enough to protect the semiconductors. Some humous wag once said we put semis in to protect the fuses. He was so close to correct that it gets requoted often. The fuses will provide longterm protection to save the heatsinks melting and if correctly rated may save a bass driver from burning out.

Don't make c7 too big. Remember that correlation to PSU.
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Old 17th December 2006, 05:09 PM   #14
tcpip is offline tcpip  India
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Quote:
Originally posted by kiwiandy
In your original post you said that you left the source resistors etc. out because of space constraints (presumably of the Eagle software). You shouldn't let details like that affect your designs.
I have a problem not shared by many on this forum. I use Linux.

That's why Eagle and Vutrax are the only semi-professional or professional solutions I can easily use.

Of these, I find Eagle about a thousand times easier to use than Vutrax. I haven't been able to figure out Vutrax enough to even design the smallest PCB yet. Why, I can't even figure out what components the Vutrax library has.

Thanks for the suggestion anyway... if I ever switch to Windows for PCB design, I'll look up Protel.
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Old 17th December 2006, 05:17 PM   #15
tcpip is offline tcpip  India
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Thanks again for the prompt and patient reply.

You haven't told me where to find Leach's writings, other than his Low-TIM amp Webpages.

[QUOTE]Originally posted by AndrewT
Quote:
VAS CCS current seems to vary between 3mA and 30mA depending on what follows, what the VAS itself can stand, what current best suits the VAS characteristics and the designer's choices.
Am I then right in believing that a Darlington VAS will hardly put any load on the input stage?

Quote:
Remove current limiting and you risk losing the VAS due to overcurrent, either due to a difficult load or due to output abuse.
Okay, I'll keep it. I may split the 47R resistor into two about-equal halves though, based on your suggestion.

Quote:
R14 and the controlling Q4 set the VAS current.
Good, then that part was correct.

Quote:
Yes, copy the current setting CCS for both transistors. But keep in mind some do not agree with this view.
If I make two independent CCS, I don't have to change any values of any resistors, right? The current setting of the VAS CCS is already being set by the R14, and that will continue. I'll just add another transistor and a 1K base resistor whose value is non-critical for setting the CCS current. Am I right?

Quote:
The fuses will NEVER be fast enough to protect the semiconductors.
Oh... okay. I was under the impression that L-MOSFETs are so robust that fuses will often blow before the device is destroyed. For BJT OPS of course whatever that Mr Wag said applies.

Quote:
Don't make c7 too big. Remember that correlation to PSU.
Yes, this part I'm still trying to figure out. Why should the decoupling caps' time constant be longer than that of the NFB circuit? And how do you calculate the time constant of the decoupling caps? I mean, there's no R to calculate RC with, is there? Do you just calculate the current flow at full load and go with that?

Thanks again.
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Old 17th December 2006, 08:34 PM   #16
AndrewT is offline AndrewT  Scotland
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Quote:
Originally posted by tcpip
.......Low-TIM amp Webpages.

Darlington VAS will hardly put any load on the input stage?

If I make two independent CCS, I don't have to change any values of any resistors, right? The current setting of the VAS CCS is already being set by the R14, and that will continue. I'll just add another transistor and a 1K base resistor whose value is non-critical for setting the CCS current. Am I right?

this part I'm still trying to figure out. Why should the decoupling caps' time constant be longer than that of the NFB circuit? And how do you calculate the time constant of the decoupling caps? I mean, there's no R to calculate RC with, is there? Do you just calculate the current flow at full load and go with that?
the capacitance of the transistor and added capacitance of the Miller comp load the LTP.

You don't need a base resistor for the CCS.

PSU time constant = speaker impedance * smoothing capacitance.
try +-20mF for 8ohm and +-40mF for 4ohm.
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Old 21st December 2006, 02:31 AM   #17
tcpip is offline tcpip  India
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Default The PCB

I tried to design a PCB for this circuit, and this is what I got.

It has three power grounds and one signal ground, all meant to be separately connected to an off-board star ground. The signal ground just provides the ground reference for the input signal and the NFB components. All other grounds are connected to one of the other three ground points.

I've kept space for a Bourns 3299 trimpot; a slimmer 3296 will fit in the same space (I believe the 3299 is supposed to be more reliable, because it has multiple wipers, not just one).

Transistor pairs for CCS, LTP diff pair, and current mirror can be made to be close to each other.... it'll take me a few minutes of work.

You can see the board is fairly tightly packed in spite of being DS PTH, because of the small Eagle board size constraints.

Will this PCB work? This is my first power amp PCB attempt.
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Old 21st December 2006, 02:48 AM   #18
tcpip is offline tcpip  India
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Hi AndrewT,

Quote:
Q7 is a Vbe multiplier.
The active part multiplies the current to maintain the voltages set by the upper and lower legs of the resistive ladder.
The lower leg resistors will ALWAYS match the Vbe of Q7, that's where the title comes from.
The 1k:2k defines the minimum voltage produced about [1+(1k/2k)]*0.65~=1V
Setting the pot to 100r sets near maximum voltage, 1+1k/0.1k*0.65=17.5V and the output stage has just overheated and wasted itself.
Sorry I couldn't respond earlier, was away at some conferences all day, and today'll be some similar nonsense. But I've been reading Slone's book about the amplified-diode circuit, and trying to understand it. Your explanation makes it clearer than where I was after reading his book.

The small resistor in series with the rheostat is basically for safety, right? To prevent the builder setting too high a Vbias inadvertently?

One general question: will a one-size-fits-all 1K:1K voltage divider do for all situations? How do you decide what value of trimpot to use for a particular amp?

But I'm confused with respect to one fact: when reading Rod Elliott's P3A construction instructions, he says "start by setting the rheostat to the minimum resistance." If I've understood you right, this is dangerous because this is when the biasing will be maximum. (Rod's design uses a 1K:2K voltage divider, incidentally.) Did I understand Rod wrong, then? I've built a P3A pair.... does this mean I just got lucky when building it?

I looked at my amp PCB (posted in the previous post) and found that there's enough space to easily add one more resistor near the trimpot. I'll do that now.
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Old 21st December 2006, 02:52 AM   #19
tcpip is offline tcpip  India
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Quote:
Originally posted by AndrewT
NFB high pass filter,
the RC is set to 220uF*330r=73mS. I think for a wideband amplifier this should be set to about 130 to 150mS, provided the PSU is set to 180 to 200mS. Setting C7 small saves money on smoothing capacitance (and attenuates the bass).
What is the correlation between the NFB HP time constant and the rail decoupling caps time constant?

And when calculating the PSU time constant, should I just take the on-board rail decoupling C into account, or also the off-board cap bank's C?

Thanks again.
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Old 21st December 2006, 08:53 AM   #20
AndrewT is offline AndrewT  Scotland
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Hi Tc,
Quote:
Originally posted by tcpip
The small resistor in series with the rheostat is basically for safety, right? To prevent the builder setting too high a Vbias inadvertently?
correct. It also reduces the sensitivity of setting the pot at the low resistance end.

Quote:
One general question: will a one-size-fits-all 1K:1K voltage divider do for all situations? How do you decide what value of trimpot to use for a particular amp?
try to get the resistor current greater than ten times the base current, to minmise variations in transistor CE current modulating the ladder ratio by sucking current from the middle of the ladder.

Quote:
reading Rod Elliott's P3A construction instructions, he says "start by setting the rheostat to the minimum resistance." If I've understood you right, this is dangerous because this is when the biasing will be maximum. (Rod's design uses a 1K:2K voltage divider, incidentally.) Did I understand Rod wrong, then?
maybe ESP had the pot on the collector side. You MUST put the pot+resistor between the base and emitter to avoid increase in current if the wiper goes momentarily or permanently open circuit. You set for minimum bias voltage which gives minimum bias voltage and this requires maximum resistance in the BE resistor leg. Neither should the base be connected to the wiper.

Quote:

What is the correlation between the NFB HP time constant and the rail decoupling caps time constant?
as far as I know, none.

Quote:
And when calculating the PSU time constant, should I just take the on-board rail decoupling C into account, or also the off-board cap bank's C?
nobody fits +-20mF to +-40mF as decoupling. Local decoupling is usually in the range 47uF to 220uF. It's a PSU calculation=smoothing capacitance.
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