Bob Cordell Interview: Error Correction

mikeks said:
Continuing from here.

Rough sim. for folk to play with. 🙂

THD~0.008%@20KHz

Improvements and critical analysis welcome.

Please, if able, can someone incorporate stuff from here?

Some participation from folk would be encouraging! :bawling:

Mike,

thank you,looks good!
Please don´t forget "plotwinsize" without thd can be worse.
The resistor values are really critical for good results...why?
Do you have a simple formula for them?

"Please, if able, can someone incorporate stuff from here?"

No, this used by far too much parts, and that´s only to improve the powerstage...which Bob has done already 25 years ago... 😉

I try to make your stage a bit simpler and realistic, with the same results.

Actual I´m more interested to use the feedback EC for overall improvement as Jan, Rodolfo and Tom done/try.

I have a whole bunch of interesting (minimum for me 😀 ) simulations with this kind of stuff.
For me it´s a time consuming problem to comment this in english, so it has to wait a little bit.

BTW Tom´s and my last overall EC try´s are NOT EC´s because they dont use positive FB, instead summers with gain .....but it seems no one has noticed that
🙂....goood
Regards
Heinz!
 

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Since the differential error-extractors are subject to huge common-mode voltage swings, i thought it prudent to bootstrap their collectors to their respective emitters to mitigate this effect.

THD<0.003@20KHz

Next step?

Incorporating the ''desensitizing'' cells discussed here and here before making final adjustments and modifications with a view to hacking a prototype PCB into an existing design.

Interested folk can pitch in here; after all LTspice is available gratis. 🙂
 

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mikeks said:
Hi Andy,

As you may have realised, headroom is an issue in the error extracter; thus, the current mirrors are necessary after all.

The arrangement below is somewhat superior to Hawksford in respect of voltage efficiency, among other things: only two pairs of drivers in series are used.

Hi Mike,

I lost track of this thread a while ago, as there were so many different discussions going on simultaneously - kind of like an IRC session. But it looks like it's beginning to converge again, so I will try to catch up with what's going on now. I'll have a look through these latest sims.

BTW, which Hawksford article discusses these desensitization cells?
 
mikeks said:
THD<0.003@20KHz

Mike, I tried your sim. You've got the output devices biased to almost one Amp each. I had to change the input shunt bias voltages from 8.6V to 7.94V to get 150 mA bias in the output stage. When I did this, distortion rose to 0.009 percent at 20 kHz. Also, the drivers have a dissipation of 3W, so they will smoke 🙂. Dissipation shows in the status bar if you hold the cursor over the device after an operating point analysis.

I've attached a sanitized version of a project I'm working on, adapted to your voltages. It uses a different approach. Dissipations seem workable, and distortion is about 0.0035 percent at 20 kHz with the output stage biased at 150 mA. This circuit also seems simpler.
 

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andy_c said:


Mike, I tried your sim. You've got the output devices biased to almost one Amp each. I had to change the input shunt bias voltages from 8.6V to 7.94V to get 150 mA bias in the output stage. When I did this, distortion rose to 0.009 percent at 20 kHz. Also, the drivers have a dissipation of 3W, so they will smoke 🙂. Dissipation shows in the status bar if you hold the cursor over the device after an operating point analysis.

Indeed, this was a rough sketch; the design is to be optimised for an all-BJT output stage; thanks for the report, nevertheless.

andy_c said:

I've attached a sanitized version of a project I'm working on, adapted to your voltages. It uses a different approach. Dissipations seem workable, and distortion is about 0.0035 percent at 20 kHz with the output stage biased at 150 mA. This circuit also seems simpler.


Thanks for that; it was getting awfully lonely in there. :bawling:

I'll take a close look and report in later. Cheers. 🙂
 
mikeks said:
Get rid of C3 (270p); the pole it introduces compromises the loop's stability.

I thnk you'll find that it actually improves loop stability. One way of looking at it is to do an AC analysis from the circuit's input to the gate of the output FET. Without the cap, the response has a large peak in the MHz range. That's equivalent to an undesired high loop gain condition for the low-gain loop. With the cap, there's a small, gentle hump - thus lower loop gain.

Here's another way of looking at it. For the sake of argument, suppose the low-pass filter formed by this capacitor and the driver's emitter resistors had a frequency response whose magnitude and phase exactly matched that of the output stage at all frequencies. Then you'd have a loop gain of zero due to the equal-amplitude, in-phase inputs of the diff amp.

I call that LPF the "estimator" because it's supposed to provide an estimate of the frequency response of the output stage.

In the Hawksford arrangement, I'm not even sure the estimator concept makes sense because of the funky cross-coupled resistor network.
 
Great thread guys.

I have to comment though that when I go back to look at Hawksford's original EC proposal as implemented by Bob Cordell, it was elegant and simple (although the underlying theory may not be, as evidenced by the discussion on this thread).

I can see some of the proposals being made here could be effectively implemented on an IC, but are they practical in a real world discrete amp?

Looking at Andy_C and Mikeks ideas, a lot of the active circuitry could go into an IC. Maybe someone from the IC industry (Maxim? LTC? Natsemi?) is around - how about a some EC building blocks available in IC format.

No doubt the zero feedback crew will get excited about the possibilities of output stages with EC distortion down at the 0.003% level, though I don't count myself in that number.
 
Bonsai said:
.....Hawksford's original EC proposal as implemented by Bob Cordell, it was elegant and simple (although the underlying theory may not be, as evidenced by the discussion on this thread).

Actually, the underlying theory and implementation are rather simple; for example see:

http://www.diyaudio.com/forums/showthread.php?postid=1071612#post1071612

http://www.diyaudio.com/forums/showthread.php?postid=1073471#post1073471

Bonsai said:
No doubt the zero feedback crew will get excited about the possibilities of output stages with EC distortion down at the 0.003% level, though I don't count myself in that number.

The ''zero feedback crew'' can be safely ignored: their views have no scientific basis, whatsoever.

Note, however, that with just 40dB global feedback at 20KHz, all we really need is open-loop output stage THD+N in the region of 0.01% to give overall closed-loop amplifier THD in the region of 0.0001%-0.001%@20KHz, assuming, of course, that your front end is also of superlative linearity.