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Old 26th August 2006, 01:34 AM   #1
Fanuc is offline Fanuc  United Kingdom
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Default Modifying a power amp input stage to use 2SK389

Hello,

I am considering modifying a power amplifier input stage (which uses PNP BJTs) to use 2SK389 dual jfet's on the input. I will have to flip the circuit over because I do not like the Ciss & Crss specs of it's complimentary 2SJ109.

I have included a part schematic of a design which uses this type of input stage. Most of the schematic is unlabelled though. It is cascoded by BJT's at about 5v into a current mirror load.

Have been reading the following post about using FET or BJT inputs on power amplifiers.

FET inputs or bipolar inputs on a power amp?

Some questions for the knowledgable on these devices!

What is the sweet spot for running the 2SK389 for lowest capacitance and highest Yfs ?

Looking at the datasheet it looks (to me at least) like 3mA Idss @ 10V. Is this the best way or use higher voltage and more current ?

I notice they come in three Idss grades GR,BL,V. On one of the graphs on the datasheet it shows the Yfs is 30mS @ 10mA Idss - so would I need to get a V grade device for more tranconductance ? Not sure on this one.

Is it best to you use dual bipolar as the cascode transistors ?. I am sure I read that the Vbe mismatches in BJT's is alot less than the Vgs spreads on fets (not sure about dual Fets though). Would prefer if I can use single bipolar devices if possible.

In the above thread someone said

"John, do you mean DC-offset caused by base currents from the input-bjts ? Well, it forces you to use DC-blocking caps (input cap, dc-cap in feedback), a big advantage of jfets..."

So would it be possible to eliminate the NFB capacitor in a Doug Self type design without miller compensation. Think I have seen this done in complimentary diff amps but not in single diff ones.

Any help/Advice appreciatted.
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Old 26th August 2006, 10:26 PM   #2
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Default Amp mod

Hi Fanuc
I know very well the dual j-fet 2sk389-2sj109.I have used them many times in my last amplifiers.
I think that your input stage is correct.
For the choice on the first stage current : this determines the gain and the bandwidth on this stage,higher current=higher gain,but higher noise.It depends on the result that you want to obtain.
I agree with you: is better the V selection for the input differential.
In my power amp I have used this solution like also the BJT cascode.For the VBE difference across the cascode normally this light loss of balance not cause problems.If this takes care to you you can use a current mirror circuit.
Only a small doubt.
It does not appeal to the 2SJ Ciss to you and it uses a 1 nF condenser with a 3.3K resistor?

Look at this schematic for some ideas.
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Old 26th August 2006, 10:45 PM   #3
Fanuc is offline Fanuc  United Kingdom
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Hello parsecaudio,

I was just wondering what, if any, experience you have of jfet input stages into a current mirror load sounds like.

Have read that jfets in some apps sound better but I ain't sure it's with a cascode and current mirror load.

Do you have any experience with this ?

Debating whether to go for a dual BJT input stage into a current mirror which would not need cascoding.

Ta
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Old 26th August 2006, 11:15 PM   #4
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Default .

Fanuc,
I can only say this.
My midrange amplifier I have given in test to a friend the past month for some days in order to confront it with some of its amplifiers.I have had to built another amplifier for my audio system.
It has turned out better than all its amplifiers:Counterpoint SA 100,NAD 2155,ROTEL RB 991.
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Old 27th August 2006, 10:50 AM   #5
AndrewT is offline AndrewT  Scotland
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Hi,
a question not a comment.

Where do you take the ground reference for the 5V cascode Zener?

You have very tight filtering on the input. What's your philosophy?

If you delete the NFB and input DC blocking caps you turn the amp into a power opamp. No problem so far. How do you plan to adjust the DC output offset? What if the output offset varies with loading/signal/temperature?

Now the big problem.
What if the source has a low AC source impedance but a high DC source impedance? i.e. is fitted with a DC blocking capacitor.
The DC impedances on the inverting and non-inverting inputs become unmatched when one differential input is DC blocked. Now you have the potential for a LARGE output offset.
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regards Andrew T.
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