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Old 27th July 2006, 04:06 PM   #1
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Default Amp distortion

Hi i've been simulating and i have built this amp. Simulation shows distortion and veroboard protoype has problems with inductive loads(x-overs, e.t.c). A 0.5uH helps but does not cure it. Can anyone help?

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Old 27th July 2006, 04:27 PM   #2
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Where are you putting the inductor? In line with the speaker? What about adding the zobel network from the speaker + to gnd?
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Old 27th July 2006, 04:48 PM   #3
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Hi Zeus


Try a forum search on Zobel network. It is discussed extensivly.


http://users.ece.gatech.edu/~mleach/...oads/zobel.pdf



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Old 27th July 2006, 05:49 PM   #4
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I don't know if this is the problem, but R3 is too high. Try around 820ohms.
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Old 27th July 2006, 06:16 PM   #5
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Decrease C4 to 10pF, see if that stops instability.
Sims donot take into account all kinds of parasitic caps and inductance. The map is not the world.

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Old 27th July 2006, 06:40 PM   #6
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You are going to need an RC network to ground at the output
(say .1 uF and 5 ohms) no matter what you do.
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Old 27th July 2006, 06:44 PM   #7
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I agree with darkfenriz as well. R3 should be lower. Have you put an oscilloscope on the output to see if it is oscillating?
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Old 27th July 2006, 07:05 PM   #8
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Default simulation transient analysis

Well the inductor in series helped solved mostly but not completely the problem. Shortcircuited in parallel with a 10R resistor is worse. I'll try the 1uF from output to ground. But still my main problem is distortion i am seeing in the simulation. Anyone has any idea where its coming from? Simulation o/p attached for 20Hz and 20KHz signals.
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Old 27th July 2006, 07:06 PM   #9
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Default Prototype circuit

Attached is the schematic of the prototype i have built
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Old 27th July 2006, 07:11 PM   #10
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Looks like clipping into rails... Does that CCS for voltage amplifier stage work properly?
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