Current mirrors driving FETs

[Kevinbd]

Hello,

Please see the PDF schematic first (I know it's quality is not so hot!). Still trying to figure this out.

The late John linsley hood in one of his mosfet designs used a supertex FET namely the VN1210M as a VAS. Anyway, regarding the current mirror preceding it, he said he could bypass one of the resistors R5 with a capacitor, an option available because we are driving a high impedance load (the fet). Apparently this improves the dynamic transconductance of the mirror and so more gain.

JLH also choose low Vceo transistors in his mirror for more gain. The newer MPSA18 spring to mind nowadays!

My Question is, how much would a three transistor mirror (base compensated) improve Zout and DC closeness (matching) compared with a normal BJT mirror like in Doug Self's design. ? ( ps. I have forgot the name of the particular mirrror in question wilson/widlar etc)

JLH also says the FET improves negative PSRR also. I think this is a seperate issue to the mirror also. I personally would like to cascode the FET with a decent video transistors. Some of these BJTs are superb.

For the experts, would current mirror (D) work ?

If low Vceo transistors are used in the mirror (the base compensated one) - say MPSA18s. Can I use a higher Vceo transistor to compensate for it's base leakage ? (in a three terminal CCS driving a FET) and still use the capacitor to help out.

This might allow a cascoded JFET VAS stage for example, if the gain is enough.

Any techniques/advice welcome.

Kevin

PS. The Italian "Chianti" red wine is starting to seriously kick in! I can bearly type properly. This will be be my last post folks.

Have a good time with your wives tonight, I am :-)

[Kevinbd]

Quick one for clarity. JLH uses circuit (C) in his mosfet amp. I am wondering if circuit (D) with additional base compensation and FET vas would work OK ?

Regards

Kevin

[amplifierguru]

Hi Kevin,

can't download your PDF for some reason but I'll comment.

You're best doing a sim and investigating aspects there - at least you can put relative figures on it.

Good luck with the Chianti and the wife (presume she's got a straw as well). I stick to the home brew beer these days - no surprises, no headaches. Wife likes it too - reckons it puts hair on her chest - probably mine.

Cheers,
Greg

[Kevinbd]

Hello,

This might be a little better. I scanned in the .PDF and turned it into a poor jpeg. Wanna speak to JCX later, how he produces almost perfect schematics with LTspice for the forum. A former software engineer who worked at the company, done schematics with AutoCAD. Electronics World also do there schematics with AutoCAD sometimes. They look excellent!

Good luck with the Chianti and the wife (presume she's got a straw as well). I stick to the home brew beer these days - no surprises, no headaches. Wife likes it too - reckons it puts hair on her chest - probably mine.

LMAO!! :-) :-)

My uncle used to make his own beer also, well ale actually. Never tried any though, I was in america setting up a subsidiary industrial electronics company. More to it than meets the eye I can assure you....

Think I will go back to america and set up my own company. On the west coast though.

Regards

Kevin

[Kevinbd]

Hopefully the JPEG works this time!

[Kevinbd]

A quicky regarding the current mirrors in the JPEG image above.

A. Is a typical bipolar CM with low Zout for driving BJT VAS's

B. Is a base compensated CM. I _think_ this is only suitable for FETs due to the higher Zout. Would appreciate answers on this?

C. Is taken from a JLH design in one of his MOSFET power amps. He bypasses one of the resistors to get more tranconductance. Because he is driving a fet. ie. high impedance load.

D. My proprosal (like Louis the 13th Cognac, if you have never had any before in Washington D.C., in theory ) is to do what JLH done with the cap bypass and add base compensation.

The transistors around nowadays are much better than 25 years ago.

The tricky part is matching the base current errors of high gain MPSA18's with a higher voltage device base compensator(essential) to ground.

Any advice/info welcome. I am an easy going bloke!

Kevin

[ilimzn]

What you are proposing is a wilson current mirror with an AC shunt for the DC degeneration. I don't see a reason why it would not work - can't see any new problems with it.
As far as the use of a Wilson CM per se, using high beta (>=100) BJTs usually reduces static imbalance to less than 1% in a simple two BJT CM, assuming at least 50mV degeneration in the emitters - usually this is more than good enough. Degeneration is done primairly for thermal drift compensation here, so JLH bypasses the resistor to increase gm back closer to it's non-degenerated value.
CM's are inherently high impedance, it is after all a current output device.

[Kevinbd]

Thanks for your reply ilimzn.

There is only one slight problem bugging me and that is base leakage errors.

Say using MPSA18 (hfe=800, Vceo=45V) for the CM pair (main) and a higher Vceo device say a MPSA06 (hfe=150, Vceo=100) as a base compensator - which has to go to ground. The rails could be +/- 65V dc.

I am giving the stats on the MPSA06 only as an example of the problem. These are not accurate.

It's knowing what the base leakage is of the MPSA18 and trying other transistors to optimize this. (probably in good electronics books, but I am to lazy to do the math)

Best Regards

Kevin

[thanh]

do you try symmetry wilson current mirror ?

[forr]

What about Bengt Olsson's article "Double mirrors reflect higher speed" published in Electronics + Wireless World, july 1995, pages 571-573 ?

~~~~~~ Forr

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