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Old 26th November 2005, 03:10 PM   #21
Steven is offline Steven  Netherlands
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Default Re: Re: Re: Re: Stasis^2

Quote:
Originally posted by Bernhard


The driver is the output ? Means Stasis output = constant current and constant voltage ?
Yes.

See patent 4,107,619 from Nelson Pass. In practice the amplifiers didn't have use an amplkifer 59 in fig 2 of that patent, but a Sziklai output stage. See circuit below.


Steven
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Old 26th November 2005, 03:52 PM   #22
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Hi Steven,

looked at your drawing and saw effectively a SE CFP if Q1 omitted/shorted and untieing Q3 base from output and used as input.

Made a drawing of it.

Cheers Michael
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Old 26th November 2005, 07:03 PM   #23
Steven is offline Steven  Netherlands
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Hi Michael,

You've noticed it! There is a lot of similarity between my circuit and a CFP or Sziklai pair. Actually, my piece of scratch paper where I put the circuit on also contains your alternative circuit, only upside down, with NPN follower and PNP current dumper. Principally, this is the same circuit that is used in the Stasis amplifiers from Nelson Pass.
Only the CFP/Sziklai does not have a constant voltage across the transistor that determines the output voltage. Your Q3 sees big voltage variations and dissipation (temperature) modulation. I know, a floating cascode, connected to the output can solve that, but then your circuit uses as many transistors as mine.
Another advantage of my circuit could be that the current in my output transistor is much larger. Any imperfect current modulation of Q2 (distortion) causes only a small percentage change in current of Q1, so the Vbe of Q1 will be very stable.
In your circuit, imperfections in the current dumper Q2 will cause more fluctuation in the collector current of Q3 and thus more Vbe changes.

Steven
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Old 26th November 2005, 09:38 PM   #24
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Very nice, Steven
You've created local current feedback around output transistor, two common base stages in loop path are potentially problemous at several MHz, did you think about freq. compensation?
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Old 26th November 2005, 10:27 PM   #25
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Hi, Ultima Thule,

It is interesting that different people can interprete the same schematic (Steven's Constants) in a different view

At first look, my view is like this :

The first thing is from Steven's explenation. No doubt that what happens with Q1 is very clever indeed.

I saw that current from IS1 (2A) is making 2 paths, one path is to collector of Q1, the other path is to emitor of Q3 (thus going to R1, activates base of Q2).

I saw this kind of action in JLH. In the attachment below, the CCS is Q8. It has 2 paths also, it can go to collector of Q3 (thus going to R9, activates Q1) or it can go to base of Q2.
But JLH doesn't have the constant I+V like Q1 in Steven's Constants.

Hi, Steven,

Am I wrong to interprete your Constants like above explenation? If IS1 in your Constants is 2A, then R1 value is the same as Q2's VBE voltage drop? (If Q2's VBE drop is 0V68, then R1=0R68?)
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Old 27th November 2005, 06:04 AM   #26
Tom2 is offline Tom2  United States
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Steven,

Great circuit. I like the reflected cascode and using the output
voltage as the base voltage for Q3. The complementary version
is also interesting to play with.

Tom
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Old 27th November 2005, 10:02 AM   #27
forr is offline forr  France
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Not precisely a constant voltage constant current configuration (I suggest you see the Perrot - Lavardin patent where an input device having these features controls an output device in a feedback loop) but an interresting and almost unknown amp configuration : the Taylor's class B amp.

~~~~~~~~~Forr

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Old 27th November 2005, 11:27 AM   #28
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Default Re: const. voltage & const. current on output FET ?

I kindly like to remind on my basic question

Quote:
Originally posted by Bernhard
Would const. voltage Vds & const. current Ids on output FET reduce nonlinearity ?
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Old 27th November 2005, 11:52 AM   #29
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Hi, Bernhard,

I'm not an expert here. But I think you will not be able to change the linearity of any device (bipolars, jfet, mosfet) by making constant current or constant voltage condition. They are what nature give, cannot be changed. What you can reduce by that 2 method is the distortion generated, it will be reduced. Like in bipolars, if you have the VCE constant, you will get minimum Early effect. Have you read the Peufeu "Memory Distortion"?
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Old 27th November 2005, 12:58 PM   #30
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Bernhard,

If you really keep both Vds and Id constant, the whole question of linear of non-linear is pointless, since there is no change. Since you probably want to amplify or buffer with the device, you will have to use additional circuitry, for instance Stevens circuit. Then you will no longer keep Vds and Id perfectly constant. There will be som change to these parameters, and as Luamanuw said, you can't get away from the inherent non-linearities in the device. Howver, if you can keep the changes small and let the other circuitry do the job, you will get better linearity in this device, since both BJTs and FETs are more linear the smaller the change is, compared to the bias current. You might thus get a near-linear behaviour if you can keep the changes very small. On the other hand, some other device must now do the hard work and the non-linearities will show up in this device instead. Local feedback, as in a CFP, might reduce that non-linearity. It is not obvious you will get a better overall performance though. If we take a CFP, for instance, it will have lower distorsion than an emitter follower with the same bias current, but the spectrum will not fall off as quickly, so the high-order distorsion will be more prominent.
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