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|3rd October 2005, 11:41 PM||#1|
Join Date: Jan 2004
Location: Koskenkorva Land
Just some ideas..
inspired by some threads I started to think through this evening about some solutions and ideas regarding PSRR in ampifiers (VAS stage pariculary especially when extrenal Miller cap is used) and couple of thermal compensation technics.
Attached is a schematic I compiled this evening with some explainig texts.
I call these ideas "novel" as I have not seen them used by anyone or explained clearly so don't get annoyed with me and that I also added a Copyright to it, it's more a principle thing as I want it to be for free in the DIY domain, eg. non commersial use.
However if anyone(commersial one) would like to use one of the technics explained and shown in my schematics he or she is free to e-mail me, I don't make any economical claims, just want to know.
You may also discuss the technics used in my schematic as well, would be fun to know what you guys think, and if any of the explained technics is already IP for some one/company I would be glad to know.
The technics explained also applies to partial topologies in the schematic, such as common emitter output or common collector output transistor arrangements, not only SE as a whole as the one I made up.
Everywhere where a NPN BJT is used it applies to also N-channel FET types, and everywhere where a PNP BJT is used it applies to also P-channel FET types.
Would be glad to answer questions, or just take part of developing the ideas, or whatever.
Just sharing some ideas to the DIY community!
Once again, please don't focus on the amplifier overall design and evetual faultiness, I have not payed ultimate attention to exactness to it, just the conceptual/principle ideas added in the circuitry.
"If transistors are blueberries and FETs are strawberries, then tubes must be.. pears"
Michael 29th January 2010
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