Noise Figures - Page 2

northsiderap · 6th May 2005, 08:32 PM

I liked the links...

Dr. Leach has more than I'll digest in a long time I'm certain...

Check out the TPT Clock and that group of links. Interesting stuff, it seems that people actually buy these things...

I finally can work out the noise figures, which was the point of my original question! Any suggestions on the proper measurement of a working model would be nice.

I'm not sure what 'Referenced to Input' means for simulation noise measurement..

I assigned a node after my DC blocking cap right before my simulated load resistor...The voltage source being measured was the +/-2 mV sine wave sweep from my signal generator at input.

I have now assigned the node to different places, and found out that much of my noise comes from my DC BJTs. That's what I get for trying to re-invent the NEVE... I think I'm going to try to squeeze a little more gain out of the JFET, but leave out the source bypass capacitor if possible.

Thanks for all of your help

jackinnj · 6th May 2005, 08:45 PM

Quote:

Originally posted by northsiderap
I liked the links...

Dr. Leach has more than I'll digest in a long time I'm certain...

One of the great and easy ways of supporting an academic is to purchase his books -- in this case "Introduction to Electroacoustics and Audio Amplifier Design" by W. Marshall Leach -- available in paperback.

tschrama · 7th May 2005, 08:48 AM

Offourse..I made an error.... I am so used to calculate these things that I immidiately changed it to 5fV^2/Hz which is 70nV/srqt(Hz), a slightly high but possible figure.. 5pV^2/Hz is not.

But offcourse 5pV^2/Hz = 2.23uV/sqrt(Hz)...

Still, the method I propose is correct

BTW
2.23uV/sqrt(Hz) is alot of noise.... this cann't be right? Only if you have gain in the thousends then is might be right. Or are you simulating openloop? If you gain is 15 then your Equivilent Input Noise (EIN) is 149nV/sqrt(Hz). An input stage usually has about 10nV (or between 3nV and 30nV) ...

Are you sure it says pV and not fV?

6th May 2005, 08:32 PM	#11
northsiderap diyAudio Member Join Date: Feb 2005 Location: Way up north, USA	A lot to digest now.... I liked the links... Dr. Leach has more than I'll digest in a long time I'm certain... Check out the TPT Clock and that group of links. Interesting stuff, it seems that people actually buy these things... I finally can work out the noise figures, which was the point of my original question! Any suggestions on the proper measurement of a working model would be nice. I'm not sure what 'Referenced to Input' means for simulation noise measurement.. I assigned a node after my DC blocking cap right before my simulated load resistor...The voltage source being measured was the +/-2 mV sine wave sweep from my signal generator at input. I have now assigned the node to different places, and found out that much of my noise comes from my DC BJTs. That's what I get for trying to re-invent the NEVE... I think I'm going to try to squeeze a little more gain out of the JFET, but leave out the source bypass capacitor if possible. Thanks for all of your help __________________ --> Jim <-- ==>NorthSideRap.com<==

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7th May 2005, 08:48 AM	#13
tschrama diyAudio Member Join Date: Jul 2001 Location: The Netherlands	Offourse..I made an error.... I am so used to calculate these things that I immidiately changed it to 5fV^2/Hz which is 70nV/srqt(Hz), a slightly high but possible figure.. 5pV^2/Hz is not. But offcourse 5pV^2/Hz = 2.23uV/sqrt(Hz)... Still, the method I propose is correct BTW 2.23uV/sqrt(Hz) is alot of noise.... this cann't be right? Only if you have gain in the thousends then is might be right. Or are you simulating openloop? If you gain is 15 then your Equivilent Input Noise (EIN) is 149nV/sqrt(Hz). An input stage usually has about 10nV (or between 3nV and 30nV) ... Are you sure it says pV and not fV?