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Old 5th February 2005, 07:14 PM   #1
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Default Anyone tried anything like this ?

Hi All,

Been doodling with the simulator.

Has anypne ever tried a circuit like this ?

I don't know enough about real-world Mosfet biasing precautions to claim that it will work.

The input stage is effectively coupled to the output devices via opposing / bias mirrors.

Cheers ........... Graham.
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Old 5th February 2005, 09:57 PM   #2
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why don't you skip this 2n5551 with leds and so get the amp more 'balanced'?

I think that only by mirroring you won't get much current gain and may be hard to drive huge gate-source capacities- emmiter followers in front of power mosfets welcome.

all in all I am impressed with such 'logical' topology, very nice, only not sure how it works while clipping?

best regards
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Old 5th February 2005, 10:46 PM   #3
jcx is offline jcx  United States
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looks a lot like Siliconix DA76-1 "The VMOS Power FET Audio Amplifier"

the refs in my '79 siliconix data book also metion JAES preprint 1106 F-8 from 54th conv, 1976

somehow i'm having trouble finding it on the web
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Old 5th February 2005, 10:52 PM   #4
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Hi Darkfenriz,

The drive is extremely symmetrical, more-so because outputs are the same !

Without the 2N5551 that half of the mirror will warm up and become imbalanced.

Cheers ......... Graham.
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Old 6th February 2005, 02:49 AM   #5
X.G. is offline X.G.  China
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Mr. Graham

I don't think the circuit can work in real world,because it cannot easily adjust the Vgs of the power mosfet in practice,like this post:

Unstable VAS current in amp from Slone book

if you add a resistor between the G pin and S pin of power mosfet,and change the compound of BC557s to current source with the correct current(must be larger than 1/2 of the current of the different), I think it can work.

cheers,

X.G.

EDITh...I miss that the compound of BC557s is actually courrent source ....then now, I advice that add the resistor above and set the current of BC557s in correct.
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Old 6th February 2005, 03:28 AM   #6
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hi,Graham Maynard :
nice circuit!it is "N" channel output devices amp,I like them very mach! some devices has no value that I can't do simulation with the schematics!
but this is good idea!

regards!
WINCO
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Old 6th February 2005, 11:26 AM   #7
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Hi XG,

The top output resistor pulls against the zener.
The zener is chosen to protect the Mosfet.
The lower output mirror resistors set the current to work against the mirrored input long tailed pair.
This is where I see only problem.......... critical biasing, possibly unstable.
Maybe a 4k7 resistor between source and gate at each output will help.
I have posted it in case anyone experienced in Mosfets can solve biasing.


Hi Darkhorse,

Yup; 'N's are the natural for silicon.
*If I were to paint the full picture, your eyes would lose interest !*

******************************************
This cicuit came out of thinking about Susan's zero feedback amplifier, which must run in class-A to keep the transformer sweet.
Susan's circuit does not have NFB working against propagation delay.
This circuit should have minimum propagation / phase delay, and therefore produce stable NFB loop controlled load damping.

There should also be enough LTP current flow to work the Mosfet capacitance at audio frequencies, say 4 to 10mA.

Cheers ........... Graham.
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Old 6th February 2005, 03:23 PM   #8
X.G. is offline X.G.  China
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hi,Mr.Graham

your circuit is similar to the Kaneta pre/power amp which name is
'compeletly symmetrical' amp.the output stage of yours is same as it which can work.... its bias method which my last post said maybe much better.

Need an all NPN (Quasi) ops power amp

this RIAA amp below is same as the basic topology of Kanenta 'compeletly symmetrical' amp.

http://www.diyaudio.com/forums/attac...amp=1043694534

this is the post which discuss Kaneta amp,but not for his 'compeletly symmetrical' circuit.
kaneda preamp

cheers,

X.G.
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Old 6th February 2005, 04:17 PM   #9
jcx is offline jcx  United States
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Bias certainly could be problematic, Shaeffer's solution was to use 10K G_D local feedback resistors to match the transfer functions of the upper and lower halves

adjusting the ltp tail current controls the difference current between the mirrored ltp collector currents and the bias ccs

the difference current causes a voltage drop in each of the 10K feedback Rs, this give a Vgs bias voltage that is referenced to Vd, and therefore the power supply V, regulated supplies seem necessary here - although a local feedforward compensation by modulating each of the ccs porprtionantly with each supply rail might work

i realize this is incomprehensible without Shaeffer's schematic, maybe someone could post it - should constitute "fair use" if we don't post the entirety of the article, but i don't have a scanner
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Old 6th February 2005, 04:27 PM   #10
X.G. is offline X.G.  China
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Hi, jcx

thank for your post....you had said what I want to say...my English is poor..

best wish from China,and happy new year...

X.G.
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