Power MOSFET class AB biasing

[ingrast]

While working in another project, I came across the need to build a MOS output stage based on a previous idea I later found to be already in use, more precisely in the Tiger line. Sziklai pairs as known were pointed to me by Tube Dude while AKSA provided valuable insight in his own experience with the configuration.

The first thing that struck me with the Tiger topology was the low gate source resistor values used, implying high dissipation in the driver devices. The low frequency pole caused by the high MOS input capacitance (typically 500p to 1nF depending on device size) can be pushed as in the Tiger case with a low resistor value, but this problem can be circumvented in my experience with higher overall loop gain and negative feedback, as well as mitigated by lead compensation at the driver input.

The other problem and much more serious as I was to learn in practice, is the effect of the high gate capacitance when the driver transistor goes from the off condition to on, forcing the feedback to push hard during crossover. The crossover glitch is almost impossible to overcome unless some form of standby biasing independent of driver transistor condition is applied, and this I did in the circuit shown (only upper half, the other is complementary symmetric) with resistor R20 from gate to ground for the time being, though this actual implementation cannot be considered adequate from the stability and repeatability standpoint. The lower MOS gm make this kind of source resistance stabilization (by R4) not nearly as good as the equivalent configuration with bipolar transistors (in my humble oppinion).

With this in mind, and pondering about output device protection desirably including some simple approach to SOA, I devised the circuit shown in the next posts. I do not know whether this topology has been proposed before, simulations look promising and I am planning to actually test it in the future once I have time for it.

[ingrast]

To achieve permanent operation in the active region, a feedback mechanism is provided through the source resistor R4, Q5 and Q3. To allow use of low source resistors, it was selected the common base differential pair configuration. It is easy to see under no M1 source current, Q5 takes most of the current from R17 leaving Q3 almost cutoff and freeing M1 gate through R3 to be pulled down by R20 thus turning it into conduction. Once a voltage drop develops in the source resistor R4, Q3 begins to conduct more rising M1 gate through R3, thus closing the negative feedback loop. D4 provides a threshold to improve gain for a given current setting.
It is easy to adjust minimum device current with standard value resistors and simulations show the added circuitry has no effect on overall amplifier performance.

In the next post, the added protection circuitry.

[ingrast]

With the addition of Q4 and D3, it is possible to provide current limiting and a rudimentary Safe Operating Area protection. Because of D3, Q4 starts to conduct with a voltage drop through the source resistor R4 much greater than needed by Q3 to operate the biasing loop. The basic operation is nonetheless the same, restricting source current to limit dependent on the source resistor value though finer adjustment can be achieved with added complexity.
Note R17 is not returned to a fixed voltage, but to the output itself. This way, when the output swings high when the amplifier is not loaded or loaded within nominal limits, less current is available for operating the protection, yet if the output is stuck to ground (or –V) there is much more current available, thus roughly tracking a power dissipation limit rather than strictly a current limit.

I should like to hear from members for comments about this circuit, and whether something just like this has been done before.

Rodolfo

[AKSA]

HI Rodolfo,

That's 1 complex circuit!!

I'm not sure that protection is altogether a good thing here....... you don't have SOAR failures with mosfets, and overcurrent is relatively easily covered with a reasonable sized fuse.

How about replacing R20 in your original diagram with a current source to the opposite rail? You could then delete R15 and R1. In fact, degeneration of the driver should not generally exceed about 22R. This will improve stability, but reduce feedback factor.

Cheers,

Hugh

[lumanauw]

The "negative drive" by R20 is a smart idea. First I read it in this Hans Hartsuiker schematic http://www.diyaudio.com/forums/attac...amp=1106685987
Its R21-R31 there.
Cool idea, and possible of non-turnoff characteristic.

[chalky]

I think that something similar to what you propose was described by Eric Margam in Wireless World sometime in the 1980s. If you're interested I can probably dig up the reference.

[ingrast]

Originally posted by AKSA
HI Rodolfo,

...you don't have SOAR failures with mosfets, and overcurrent is relatively easily covered with a reasonable sized fuse....

Yes, I expressed myself wrong, I want to address a situation where maximum current is not exceeded but because of overload, device dissipation does.

How about replacing R20 in your original diagram with a current source to the opposite rail? You could then delete R15 and R1. ..

Hugh

Replacing R20 with a current source goes a long way to make biasing independent on supply voltage. Yet I think an active biasing scheme is better suited because of the mentioned lower gm of MOSFETS. R15 is there simply for luck. (Well seriously, to divert power dissipation from Q1).

Rodolfo

[ingrast]

Originally posted by lumanauw
The "negative drive" by R20 is a smart idea. First I read it in this Hans Hartsuiker schematic http://www.diyaudio.com/forums/attac...amp=1106685987
Its R21-R31 there.
Cool idea, and possible of non-turnoff characteristic.

Yes, I was aware of that circuit but it is for bipolars.

Also as noted, because of gate capacitante the turn on glitch is a much more serious and difficult to control issue unless a minimum operating current is always guaranteed. But the actual problem addressed with this scheme is to establish a well defined operating point.

Rodolfo

[ingrast]

Originally posted by chalky
I think that something similar to what you propose was described by Eric Margam in Wireless World sometime in the 1980s. If you're interested I can probably dig up the reference.

Yes, I should be interested to hear about it but only if it doesn't bother you too much. Thanks in advance !!

Rodolfo

[lumanauw]

Also as noted, because of gate capacitante the turn on glitch is a much more serious and difficult to control issue unless a minimum operating current is always guaranteed.

Hi, Rodolfo,

Maybe I'm thinking a little short here, but if you adjust the whole cct so it perform "not-turn-off", you won't encounter gate capacitance glitch at turn on? Because the mosfets are always on.