random amplifier design questions
Some of this is related to my amateurish discussion with JensRasmussen of aspects of his circuit design, some not.
1) What is the mechanism of the instability that gate resistors are supposed to ameliorate? If you have a compact enough layout and drive the gate from a high impedance (as high as the get resistor would have been) does a gate resistor do any good?
2) How would you achieve temperature-independent biasing, like current proportional to absolute temperature for better control of BJT transconductance without lots of matched devices for making the bias circuit?
3) What sorts of time constants / and ESPECIALLY what capacitor types (low leakage electrolytics??) are good to use for the DC rejection cap that makes the amp have unity gain at DC? Or is it better to use a servo op-amp...
I hope these (basic) questions aren't considered annoying.
This thread on biasing might have some useful info.
What I was really trying to get at, with the question on biasing, is really a kind of silly question, becasue I was thinking about input stages, second gain stages, etc, not so much output stages,
and of course it is in the output stage where the temperature change is so significant.
But if you are trying to achieve controlled gain, then even ignoring rapidly varying thermal effects, the ambient temperature has a significant effect on gain, and it seems there are two ways to deal with it:
Either use lots of degeneration resistance, which has other benefits too but kills the gain,
Or bias the circuits with a current that increases with temperature.
The simple and elegant Vbe/R circuits that people tend to use to set bias currents give the opposite result ...
Come to think of it, as long as you can adjust the resulting current with a trimpot ( I hate trimpots though ), you don't necessarily need precise matching to build a delta-Vbe current source, just trim out the error...
With any luck I'll just convince myself that the idea is silly because the operating temperature of the small signal stages is just not going to change enough to make a difference.
MOSFETs are scary fast under the right conditions, and
when the circuit they sit in is not ideal, they can turn
that non-idealness into a fine multi-MHz oscillator. The
Gate resistor slows them down enough to play well with
in BJT's the thermal drift we deal with is usually Vbe, not
current gain. This does not require matching as such, since
the Vbe is quite consistent from part to part, and we never
parallel BJT's without an emitter resistor due to the potential
for thermal runaway and current hogging. :@)
Somewhere below 1 Hz is pretty acceptable. If you could
find a perfect capacitor, there would be little reason to
pursue servos and such. Aaarr, but there's the rub: the
capacitor be the devil himself, says I...
voltage gain stage
Suppose you wanted to have well defined gain in a BJT stage that had little or no degeneration. I'm not talking about power output stage.
You would want the current to increase proportional to absolute temp.
For some reason, this doesn't usually seem to matter. Is it because we assume that the low power stages of amplifiers are going to operate at or near room temperature, so don't worry about temperature compensation, or is it becasue they are usually degenerated with emitter resistors to the point that their gain is defined as a resistor ratio.
I'm just probing for general design philosophy, hoping anyone interested will pipe in.
And about those devilish capacitors. They are a problem. The latest digikey catalog does list some suggested replacements for panasonic Z-series low leakage electrolytics.
Servos are looking better all the time though, I suppose.
How do one meassure PSRR ?
Given an input, measure the output with two different rail voltages ? First and second.
Then 20*log(Vsecond/Vfirst) ??
Problem with gate of jfets is not instability, but oscillation at high frequency (50 MHz or so) This is very dependent of the layout, wiring, and occurs with high transconductance devices such 2SK170/370.
The solution is to insert a resistor in the gate connection (470 ohms) as close as possible of the device, even on the device lead itself. It's not a good idea to drive a jfet by a high impedance : no effect on HF oscillation (because of stray capacitances) and possible increase of distortion.
Well, since you normally care about PSRR at some frequency other than DC, to _simulate_ it you have to do two AC simulations, maybe make two copies of the circuit inside the simulator, one with AC stimulus on the power supply and one with AC stimulus on the input. Divide the output from the first circuit by the output from the second.
I wouldn't want to try to actually _measure_ it at frequency. To measure it at frequency you probably need to have a power amp that can handle capacitive loads, and transformer-couple it in series with the power supply of your amplifier under test to stimulate it through the power supply input. Ick.
Driving a JFET from a high impedance ...
Thank you, P. Lacombe, for the explanation of the HF oscillation.
Would driving a JFET by a high impedance produce distortion because Cgs is nonlinear, or is there some other mechanism?
Yet another shameless plug.....
Check out Bob Pease's book......Troubleshooting Analog Circuits. Good reference on measuring PSRR and CMRR the right way. Lots of other very useful stuff. Just don't tell Bob you work on exotic audio stuff.
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