phase response etc
Phase response starts changing well before the amplitude response. That's why I would be inclined to use a really long time constant in the DC rejection part of the feedback, so that at audible frequencies, the phase is rock solid.
When you are trying to set/simulate the loop compensation, are you breaking the feedback loop for the simulation?
The closer you get to 180 degrees, the more ringing you will get when you hook up the feedback... I'd aim for a phase margin of 70 degrees or so -- that gives decent step responses and plently of margin for error.
Base current for the outputs does flow in the Vbe multiplier. Think of what happens when the output is being driven hard one way. The opposite side essentially turns off. The current required to discharge the bases of the opposite side's output transistors has to flow through the impedance of the Vbe multiplier.
I see the current generators for the bias; they are Vbe/R. Looks like you are going to get about 3 mA per side at room temp. But Vbe drops fast with temp. Because the input stage is degenerated, its gain won't really change so much. It would perhaps be an issue with less degen; as it is it should be OK; I spoke (wrote) too soon.
I don't know if it makes sense to reduce the output level at HF via global feedback via C6/R42. One thing you might want to try instead is connecting the 10 pF to one or the other side of the Vbe multiplier, to leave the output stage, with its (relatively) large parasitic capacitances and slowness, out of the HF loop. As it is I don't think it really does much for the stability, since it increases the loop gain at HF. Does this make sense?
Anyway, this is fun. I get to think about a circuit without the tedium of simulating it or the responsibility for messing it up
Phase response starts changing well before the amplitude response. That's why I would be inclined to use a really long time constant in the DC rejection part of the feedback, so that at audible frequencies, the phase is rock solid.
When you are trying to set/simulate the loop compensation, are you breaking the feedback loop for the simulation?
The closer you get to 180 degrees, the more ringing you will get when you hook up the feedback... I'd aim for a phase margin of 70 degrees or so -- that gives decent step responses and plently of margin for error.
Base current for the outputs does flow in the Vbe multiplier. Think of what happens when the output is being driven hard one way. The opposite side essentially turns off. The current required to discharge the bases of the opposite side's output transistors has to flow through the impedance of the Vbe multiplier.
I see the current generators for the bias; they are Vbe/R. Looks like you are going to get about 3 mA per side at room temp. But Vbe drops fast with temp. Because the input stage is degenerated, its gain won't really change so much. It would perhaps be an issue with less degen; as it is it should be OK; I spoke (wrote) too soon.
I don't know if it makes sense to reduce the output level at HF via global feedback via C6/R42. One thing you might want to try instead is connecting the 10 pF to one or the other side of the Vbe multiplier, to leave the output stage, with its (relatively) large parasitic capacitances and slowness, out of the HF loop. As it is I don't think it really does much for the stability, since it increases the loop gain at HF. Does this make sense?
Anyway, this is fun. I get to think about a circuit without the tedium of simulating it or the responsibility for messing it up
Current feedback to the predrivers
Hi there..
The idear was to protect the surcuit against oscelation by means of local feedback. Much the same way the Output transistors are forced to work more or less the same by means of the Emitter resistance.
I don't know if this is the way to do it.
\Jens
Hi there..
The idear was to protect the surcuit against oscelation by means of local feedback. Much the same way the Output transistors are forced to work more or less the same by means of the Emitter resistance.
I don't know if this is the way to do it.
\Jens
on current feedback ....
I think the base resistances can help with thermal stability, but not with preventing oscillation. How does it change the simulated results? I hope someone else comments on this, too...
I suppose C3 does what I was suggesting the larger cap across the Vbe multiplier should do. How is the value of the cap C15 across the Vbe multiplier chosen, then?
A problem with my suggestion of using a large time constant for the DC reject part of the feedback network, is getting a good cap that is so large. I have always been disappointed that Panasonic discontinued their low leakage "Z-series" capacitors. I don't know of anything else quite as good that would be appropriate for this application; again, I'm sure someone else can comment!
I think the base resistances can help with thermal stability, but not with preventing oscillation. How does it change the simulated results? I hope someone else comments on this, too...
I suppose C3 does what I was suggesting the larger cap across the Vbe multiplier should do. How is the value of the cap C15 across the Vbe multiplier chosen, then?
A problem with my suggestion of using a large time constant for the DC reject part of the feedback network, is getting a good cap that is so large. I have always been disappointed that Panasonic discontinued their low leakage "Z-series" capacitors. I don't know of anything else quite as good that would be appropriate for this application; again, I'm sure someone else can comment!
Thermal Stability
Hi all
Well i must say that I haven't done any thermal simulations yes....but I suspect the amp will need to be modified around the Vbe multiplier before it's thermally stabel.
The Idear of C3 is a "speed up" cap, to help turn off the output part of the amp.
I thinking about trying a double pole compensation consept to set the domenating pole (And to get more OL gain). Don't know if this is a good idear i sure have some problems getting the fase of Vout to stay within - 180 degrees. Does anyone know how to make the calculations with a double pole ?? I'll post a conceptual schmatic later...
Also I'm not sure if it could be a smart move to use the feedback consept of Mr. Leach's amp design to get within the phasemargin ??
Thanks for any input
\Jens
Hi all
Well i must say that I haven't done any thermal simulations yes....but I suspect the amp will need to be modified around the Vbe multiplier before it's thermally stabel.
The Idear of C3 is a "speed up" cap, to help turn off the output part of the amp.
I thinking about trying a double pole compensation consept to set the domenating pole (And to get more OL gain). Don't know if this is a good idear i sure have some problems getting the fase of Vout to stay within - 180 degrees. Does anyone know how to make the calculations with a double pole ?? I'll post a conceptual schmatic later...
Also I'm not sure if it could be a smart move to use the feedback consept of Mr. Leach's amp design to get within the phasemargin ??
Thanks for any input
\Jens
Re: SOA for BJT
If you want to do something somewhat complicated, then use MosFET HEXFET transistors to switch output collector current on and off as referenced to the audio signal.
Basically, build a circuit that when the audio is above say +10-15 volts on the base of the NPN output, then the voltage on the collector of the PNP output switches off until the signal voltage is below +10-15 volts and then switches back on to 63V. Don't forget the pulldown resistor. Do the same thing with the other polarity, and you will solve the problem with breakdown voltage of "off" transistor, it could then only have 70V max. Must heat sink FET's though.
The only drag is you have to use a P-Channel PWR FET for the positive side. and an N-Channel. (maybe ECG2382 &ECG2383) sometimes the P-Channel is hard to find. $$$
I may post a drawing later to explain better.
JensRasmussen said:
If you want to do something somewhat complicated, then use MosFET HEXFET transistors to switch output collector current on and off as referenced to the audio signal.
Basically, build a circuit that when the audio is above say +10-15 volts on the base of the NPN output, then the voltage on the collector of the PNP output switches off until the signal voltage is below +10-15 volts and then switches back on to 63V. Don't forget the pulldown resistor. Do the same thing with the other polarity, and you will solve the problem with breakdown voltage of "off" transistor, it could then only have 70V max. Must heat sink FET's though.
The only drag is you have to use a P-Channel PWR FET for the positive side. and an N-Channel. (maybe ECG2382 &ECG2383) sometimes the P-Channel is hard to find. $$$
I may post a drawing later to explain better.
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