|16th December 2004, 11:50 PM||#31|
Join Date: Jun 2004
Not that I'm an expert in the field but.....
As for the input stage I would use some sort of PFC topology,
with FETs of course, to create the DC link voltage. The FET in the
PFC stage is circuit common referenced and need only a "low side"
driver= no esoteric pulse transformer design. Also the benefits of
using PFC (boost) for the input are wide input voltage and low
THD on the mains side.
After the PFC stage there must be the DC/DC stage which uses a
transformer to get the isolation barrier. There are a variety of topologies
to consider here. You just want to bring the DC link voltage from
the PFC down to what you want as output. A half or full bridge will
need some level shifting of the gate commands for the upper FETs.
Here you need to consider either a driver with level shift (high side driver)
or use gate pulse X-formers.
Also a flyback design could do the job.
Personally I would just stick with the old iron core and big caps unless
mass production is called for.
But if you really want SMPS it is perfectly possible but keep the safety
goggles on and use at least a variable ac source. Make sure all
low voltage circuits are running OK before any HV is applied or
things can get expensive.
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