Almost there........Feedback Problem Perhaps??
OK. Got the attached circuit on the breadboard. after finding my usual idot attacks it seemed to be working perfectly. Then I got up to 1k and noticed a little distortion. get to 10 or 20k and it's down right hideous. so I am thinking i need to look at the feedback path. Any suggestions from the elders? (in this case elders has nothing to do with age....but knowledge). Thanks guys
Oh the second attachment is the out put at 10k......Have an FFT of it as well bit i think we can all guess that there is alot of nasty stuff on that one.
here's the scope shot
as promised.......it's ugly
failed to mention
I simulated this circuit and everything was good. Aaaaargh!.............:confused:
what transistors are you using? and have you tried increasing the current in the input and VAS stage, from that plot it almost looks like your circuit is slew rate limited and then saturateing.
It strikes me that the values of your R6 and R7 are way too high, also that you have insufficient differential input stage current for 20kHz accuracy with a 100pF VAS connected C.dom.
I would not have R4 higher than 100 ohms and R6/7 above 47 ohms.
100 ohms in series with input might also help limit hf overload.
Have you measured the output stage quiescent current ? Expect 10 to 20mV between Q7 and Q9 emitters..
Cheers .......... Graham.
I'm not elder than enybody here (my experience is poor) but:
1.as mentioned before:R6,R7 are too high
2.You Vbe multiplier should regulate base-to-base voltage to set accurate biasing- but I guess it is drawing mistake
3.what is your idle current- have you measured voltage drop on R16/R17???
4. I would throw out C5- the voltage thru emmiter resistor may be as big as 1V. - would it work correct then???
reason for this ugly 'sine' I think is overdriven differential stage
also you may diminish R13
cheers and good luck
It's difficult to be definitive without building it and measuring it down to the last root Hertz, so here goes......
1. Degeneration on R6/R7 is huge because your LTP stage current is about 1.24mA, so 0.62mA down each leg. At 600R degeneration, you will have 370mV across each, which, given the VAS will have around 630mV between base and emitter, leaves less than 260mV Vce on the current mirror device. This is not sufficient. Reduce the R6/R7, as Graham remarked, to 100R.
2. A current mirror will ensure that the currents through the emitters are identical. Since the VAS base is supplied from Q10's collector, and since the VAS base bias will be around 70uA, the two collector legs of the LTP are distinctly NOT equal. Better to simply replace the current mirror with a single resistor of 1150R to ensure LTP balance.
3. Q3 base to output resistance is 10K, but Q2 base to ground is only 1K. These resistance paths must be equal for zero offset with matched 1% transistors. Solution: Increase R25 to 10K.
4. Lag compensation is too high for a 1.24mA LTP stage current. Reduce C3 to 47pF.
5. Rather than use a series RC across the feedback resistor, try using 16pF from collector of Q4 to the feedback node (base of Q3). This is phase lead, much loved by JLH, and it will make the amplifier more tolerant of highly capacitive loads.
6. There is far too much emitter degeneration in the LTP. Reduce the 100R you are using down to 10R. This will raise feedback ratio at high audio frequencies and eliminate the distortion you are seeing at 20KHz.
7. You should be using base stoppers of 10R on Q7 and Q9, as these are 30MHz transistors.
8. I'd be reducing the C5 charge suckout from 1uF to 0.22uF.
9. To enable setting the bias at around 60mA, I'd replace R11 with a 2K trimpot.
10. To promote more bias stability with temperature changes, I'd be increasing emitter degeneration on the output devices from 0R22 to 0R47.
Once this is done, you'll have an eminently stable power amplifier which sounds acerbically clean with microtome accuracy. You may actually love the sound, but some will not!!
I'll agree with Hugh here but why using the R23?
I have a few questions to your comments.
Are you referring to R13?
Do you mean a 10R resistor between the driver and power transistor?
Why? I thought the point was to lower the AC impedance (?).
6) R2, R3
7) in series with the base Q7, Q9
8) This cap has to do work at 100 kHz or above. Good HF properties are a must. 0.22 or 0.1 is better than 1 uF in this sence but 1 uF/63V polyester will probably be OK.
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