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Old 9th November 2004, 04:01 AM   #1
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Default Conecting VAS-outut stage

Usually we make configuration of fig.A for audio power amp. T1 and T2 are VAS transistors, T3 is VBEmultiplier.

I see in a commercial product, it uses fig.B. T1 and T2 are the VAS transistor, but after that it has an EF to drive point A. Point A is then injected to EMITORS of T3-T4 (VBEmultiplier), and in top and down of T3-T4 there's CCS.

Fig.C looks similiar to fig.B, but different. T1 and T2 are VAS, driving point A. But here, point A is injected directly to base of output stage---via R2 and R3--- (not to emitors like fig.B), and between output stages there are VBEmultiplier T3.

I dont understand about fig.C. In fig.B, the current flowing to T3-T4 line always constant, made by the CCS's.
But in fig.C, the current flowing to R1 for example will vary alot, depends on the position of signal stage.

Would Fig.C gives more distortion compared to Fig.B? But fig.C agrees more with "simpler=better".

Or is there any other way to look/comparing the pro/cons of these 3 figures?
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Old 9th November 2004, 10:53 AM   #2
MikeB is offline MikeB  Germany
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Hi !

I would say, in terms "simpler is better" Fig.A is unbeatable.
Fig.C looks like a poor version of Fig.B. I'm not sure about fig.b,
looks like making simple things complex. I need to sim this if it
has any advantage, but a simple tripledarlington should be better.
It's possible that fig.b does some dynamic biasing, but need to check.
The idea would be, that if driver needs more current, the current
through t3/t4 and the resistors is reduced, closing t3/t4, resulting
in increased bias.

Mike
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Old 9th November 2004, 11:51 AM   #3
boholm is offline boholm  Denmark
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. . . and in C the resistors R1-4 acts as a simple divider. IMHO not a good idea.
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Old 9th November 2004, 01:07 PM   #4
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Hi, Everybody,

I tought the same thing at first. But Lars Clausen used it in Zeta amp, and ElsoKwok used it in KISS amp. Both schematic can be found in solid state forum.
These two designer are reputable, and they use fig.C. I wonder why they dont use fig.B
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Old 9th November 2004, 06:53 PM   #5
boholm is offline boholm  Denmark
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Yes and no.

As for Zeta: The trick is to give R1 and R4 (in ref. to your C) as high a value as possible, which is done in the Zeta with the transistors T12 and T13 . Note that there are no resistors from the bases of T12 and T13 to rails, so it is not like your drawing C.

As for Kiss: (If have been looking at the right schematics) There you have a very small R2 and R3 (in ref. to your C) in regard to R1 and R4: 680 ohms vs. 20 kohms // impedance of 2sc2238 (?)

// = parallel with . . .

Addendum for Zeta: I do not know the impedance of the T12 and T13, since the rest of the circuit also plays its part, and I haven't done any calculations or simulations, so I am merely reasoning

Can't tell why they don't use B. But they may not know of it . . . ?
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Old 10th November 2004, 01:19 AM   #6
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Hi, Boholm,

In Zeta, T12 and T13 are driving output, so R1=R27, R2=R26, R3=R23, R4=R34. Between T12 and T15 it is like Diamond buffer, and between T13,T14,T21 is diamond buffer+CFP. I maybe wrong, we should ask LC himself.

The merit of using Zeta-like output stage, according to LC, is that we have rail efficiency, since it is not drawn by VBE multiplier drop (he uses mosfet output stage, which needs 3-4Vgs).

Back, lets see KISS amp. The R1-4 is 20k-680-680-20k. The rail is 80V. Lets neglect the 680ohm. If there is no signal, there will be 80V accross 20k=4mA.

If there is 75V sinusoidal peak at output, the voltage accross 20k=5V--->that means only 0.25mA accross R20k.

The current flowing in R1-4 will vary very much, that means the current fed to final stage will also vary.

More THD from fig.C?
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Old 11th May 2005, 02:02 PM   #7
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lumanauw ,
I want to drive mosfets instead of the output transistors in your

configuration of fig A , hence I will need around 9v across collector &

emitter of T3 , TI & T2 are in cascoded stage VAS , T4 & T5 will be

emitter followers voltage driving T5& T6 which will be output mosfet

devices IRFP 240 / 9240 , the supply at the VAS will be 10v higher than

the output devices in both rails ,
I tried it but am unable to get more than 6v across T3 , how can I

increase this to 9v ??
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Old 11th May 2005, 02:35 PM   #8
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Hi Rajeev ,

Try to add a 3.9V zener in series with the bias regulator transistor.

regards,
Kanwar
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Old 12th May 2005, 05:42 AM   #9
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Ampman,
I tried that , I had put a 4.7v zener but I think the voltage is not increasing because of the cascode stage in the VAS, is this it ??
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Old 12th May 2005, 02:18 PM   #10
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Quote:
Originally posted by rajeev luthra
Ampman,
I tried that , I had put a 4.7v zener but I think the voltage is not increasing because of the cascode stage in the VAS, is this it ??

Hi Rajeev,
Kindly post the circuit diagram so that I could help you in your problem.

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