In what case can we go for open loop, and when should we use feedback?

[Bricolo]

Do someone have an example schematic for an open loop gain cell?

 

[till]

Do someone have an example schematic for an open loop gain cell?

i would expect there are some in the pearl, BZLS, SOZ and other articles at passdiy.

 

[Bricolo]

Or simply a BOZ? (I don't need balanced in and out)

 

[mikeks]

In what case can we go for open loop.............

In linear audio amps? NEVER!

 

[till]

nonlinear gainstage

 

[Bricolo]

nonlinear gainstage

I just simulated the "input stage" with 1 fet
why is it so unlinear?

 

[till]

i simulated it as drawn, and it looks pretty linear.

the title was aimed on the ot posting above.

 

[Bricolo]

i simulated it as drawn, and it looks pretty linear.

the title was aimed on the ot posting above.

That's odd.
I use simetrix too, and simulated your schematic (the whole schematic)

Placing a probe on the output, a transient analysis gives 0.04% distortion
same analysis, but the probe at the output of the fets: 5% distortion!

 

[till]

i have some miracolouse effects with the simetrix spice THD analizer also. I think we need to build some and measure THD with spectralab or so.

for small input signals ans much gain:

 

[Bricolo]

can 10V RMS be considered as small signal?

 

[till]

wanted to see what gain at reasonable bandwith will be possible

the input signal is 10mv, with more it will clip


indeed i get lower thd at the jfet stage output than at the input ???

Bob Pease told us, spice lies.

 

[till]

to much feedback?

 

[Jocko Homo]

"Add some current sources, son.......

You'll enjoy it better."

(Repo Man has got all night, every night............)

Jocko